[PATCH] [x86] Do not convert to cmp32 for Atom arch.

[Sergey Okunev]

  Updated patch with added test case.

Hi grosbach,

http://llvm-reviews.chandlerc.com/D2824

CHANGE SINCE LAST DIFF
  http://llvm-reviews.chandlerc.com/D2824?vs=7197&id=7771#toc

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/atom-cmpb.ll

Index: lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- lib/Target/X86/X86ISelLowering.cpp
+++ lib/Target/X86/X86ISelLowering.cpp
@@ -9768,12 +9768,14 @@
  
   if ((Op0.getValueType() == MVT::i8 || Op0.getValueType() == MVT::i16 ||
        Op0.getValueType() == MVT::i32 || Op0.getValueType() == MVT::i64)) {
-    // Do the comparison at i32 if it's smaller. This avoids subregister
-    // aliasing issues. Keep the smaller reference if we're optimizing for
-    // size, however, as that'll allow better folding of memory operations.
+    // Do the comparison at i32 if it's smaller, besides the Atom case. 
+    // This avoids subregister aliasing issues. Keep the smaller reference 
+    // if we're optimizing for size, however, as that'll allow better folding 
+    // of memory operations.
     if (Op0.getValueType() != MVT::i32 && Op0.getValueType() != MVT::i64 &&
         !DAG.getMachineFunction().getFunction()->getAttributes().hasAttribute(
-             AttributeSet::FunctionIndex, Attribute::MinSize)) {
+             AttributeSet::FunctionIndex, Attribute::MinSize) &&
+        !Subtarget->isAtom()) {
       unsigned ExtendOp =
           isX86CCUnsigned(X86CC) ? ISD::ZERO_EXTEND : ISD::SIGN_EXTEND;
       Op0 = DAG.getNode(ExtendOp, dl, MVT::i32, Op0);
Index: test/CodeGen/X86/atom-cmpb.ll
===================================================================
--- /dev/null
+++ test/CodeGen/X86/atom-cmpb.ll
@@ -0,0 +1,52 @@
+; RUN: llc < %s -march=x86 -mcpu=atom | FileCheck %s
+; CHECK:        movl
+; CHECK:        movb
+; CHECK:        movb
+; CHECK:        movb
+; CHECK:        cmpb
+; CHECK:        notb
+; CHECK:        notb
+; CHECK:        notb
+; CHECK:        movb
+; CHECK:        cmpb
+; CHECK:        movb
+; CHECK:        cmpb
+
+; Test for checking of cancel conversion to cmp32 in Atom case 
+; in function 'X86TargetLowering::EmitCmp'
+ 
+define i8 @run_test(i8* %rd_p) {
+entry:
+  %incdec.ptr = getelementptr inbounds i8* %rd_p, i64 1
+  %ld1 = load i8* %rd_p, align 1
+  %incdec.ptr1 = getelementptr inbounds i8* %rd_p, i64 2
+  %ld2 = load i8* %incdec.ptr, align 1
+  %incdec.ptr2 = getelementptr inbounds i8* %rd_p, i64 3
+  %ld3 = load i8* %incdec.ptr1, align 1
+  %x4 = xor i8 %ld1, -1
+  %x5 = xor i8 %ld2, -1
+  %x6 = xor i8 %ld3, -1
+  %cmp34 = icmp ult i8 %ld2, %ld1
+  br i1 %cmp34, label %if.then3, label %if.else
+ 
+if.then3:
+  %cmp3 = icmp ult i8 %x4, %x6
+  %.sink3 = select i1 %cmp3, i8 %x4, i8 %x6
+  br label %if.end4
+ 
+if.else:                           
+  %cmp4 = icmp ult i8 %x5, %x6 
+  %.sink4 = select i1 %cmp4, i8 %x5, i8 %x6
+  br label %if.end4 
+ 
+if.end4:          
+  %xk = phi i8 [ %.sink3, %if.then3 ], [ %.sink4, %if.else ]
+  %sub7 = sub i8 %x4, %xk
+  %sub8 = sub i8 %x5, %xk 
+  %sub9 = sub i8 %x6, %xk 
+  %add10 = add i8 %sub7, %sub8
+  %res   = add i8 %add10, %sub9 
+  ret i8 %res      
+
+}
+
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