[llvm] r203527 - R600: Calculate store mask instead of using switch.
Matt Arsenault
Matthew.Arsenault at amd.com
Mon Mar 10 18:38:53 PDT 2014
Author: arsenm
Date: Mon Mar 10 20:38:53 2014
New Revision: 203527
URL: http://llvm.org/viewvc/llvm-project?rev=203527&view=rev
Log:
R600: Calculate store mask instead of using switch.
Modified:
llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp
Modified: llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp?rev=203527&r1=203526&r2=203527&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp Mon Mar 10 20:38:53 2014
@@ -630,17 +630,8 @@ SDValue AMDGPUTargetLowering::MergeVecto
unsigned MemEltBits = MemEltVT.getSizeInBits();
unsigned MemNumElements = MemVT.getVectorNumElements();
EVT PackedVT = EVT::getIntegerVT(*DAG.getContext(), MemVT.getSizeInBits());
- SDValue Mask;
- switch(MemEltBits) {
- case 8:
- Mask = DAG.getConstant(0xFF, PackedVT);
- break;
- case 16:
- Mask = DAG.getConstant(0xFFFF, PackedVT);
- break;
- default:
- llvm_unreachable("Cannot lower this vector store");
- }
+ SDValue Mask = DAG.getConstant((1 << MemEltBits) - 1, PackedVT);
+
SDValue PackedValue;
for (unsigned i = 0; i < MemNumElements; ++i) {
EVT ElemVT = VT.getVectorElementType();
@@ -725,12 +716,7 @@ SDValue AMDGPUTargetLowering::LowerLOAD(
return SDValue();
- unsigned Mask = 0;
- if (Load->getMemoryVT() == MVT::i8) {
- Mask = 0xff;
- } else if (Load->getMemoryVT() == MVT::i16) {
- Mask = 0xffff;
- }
+ unsigned Mask = (1 << Load->getMemoryVT().getSizeInBits()) - 1;
SDValue Ptr = DAG.getNode(ISD::SRL, DL, MVT::i32, Load->getBasePtr(),
DAG.getConstant(2, MVT::i32));
SDValue Ret = DAG.getNode(AMDGPUISD::REGISTER_LOAD, DL, Op.getValueType(),
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