[llvm] r203110 - [SystemZ] Remove "virtual" from override methods
Richard Sandiford
rsandifo at linux.vnet.ibm.com
Thu Mar 6 04:03:36 PST 2014
Author: rsandifo
Date: Thu Mar 6 06:03:36 2014
New Revision: 203110
URL: http://llvm.org/viewvc/llvm-project?rev=203110&view=rev
Log:
[SystemZ] Remove "virtual" from override methods
Also fix a couple of cases where "override" was missing. No behavioural
change intended.
Modified:
llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
llvm/trunk/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
llvm/trunk/lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.h
llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h
llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp
llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp
llvm/trunk/lib/Target/SystemZ/SystemZAsmPrinter.h
llvm/trunk/lib/Target/SystemZ/SystemZConstantPoolValue.h
llvm/trunk/lib/Target/SystemZ/SystemZElimCompare.cpp
llvm/trunk/lib/Target/SystemZ/SystemZFrameLowering.h
llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h
llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h
llvm/trunk/lib/Target/SystemZ/SystemZLongBranch.cpp
llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h
llvm/trunk/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
llvm/trunk/lib/Target/SystemZ/SystemZShortenInst.cpp
llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h
llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp
llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h
Modified: llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp Thu Mar 6 06:03:36 2014
@@ -162,7 +162,7 @@ public:
}
// Token operands
- virtual bool isToken() const override {
+ bool isToken() const override {
return Kind == KindToken;
}
StringRef getToken() const {
@@ -171,13 +171,13 @@ public:
}
// Register operands.
- virtual bool isReg() const override {
+ bool isReg() const override {
return Kind == KindReg;
}
bool isReg(RegisterKind RegKind) const {
return Kind == KindReg && Reg.Kind == RegKind;
}
- virtual unsigned getReg() const override {
+ unsigned getReg() const override {
assert(Kind == KindReg && "Not a register");
return Reg.Num;
}
@@ -189,7 +189,7 @@ public:
}
// Immediate operands.
- virtual bool isImm() const override {
+ bool isImm() const override {
return Kind == KindImm;
}
bool isImm(int64_t MinValue, int64_t MaxValue) const {
@@ -201,7 +201,7 @@ public:
}
// Memory operands.
- virtual bool isMem() const override {
+ bool isMem() const override {
return Kind == KindMem;
}
bool isMem(RegisterKind RegKind, MemoryKind MemKind) const {
@@ -221,9 +221,9 @@ public:
}
// Override MCParsedAsmOperand.
- virtual SMLoc getStartLoc() const override { return StartLoc; }
- virtual SMLoc getEndLoc() const override { return EndLoc; }
- virtual void print(raw_ostream &OS) const override;
+ SMLoc getStartLoc() const override { return StartLoc; }
+ SMLoc getEndLoc() const override { return EndLoc; }
+ void print(raw_ostream &OS) const override;
// Used by the TableGen code to add particular types of operand
// to an instruction.
@@ -340,18 +340,16 @@ public:
}
// Override MCTargetAsmParser.
- virtual bool ParseDirective(AsmToken DirectiveID) override;
- virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
- SMLoc &EndLoc) override;
- virtual bool
- ParseInstruction(ParseInstructionInfo &Info,
- StringRef Name, SMLoc NameLoc,
- SmallVectorImpl<MCParsedAsmOperand*> &Operands) override;
- virtual bool
- MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
- SmallVectorImpl<MCParsedAsmOperand*> &Operands,
- MCStreamer &Out, unsigned &ErrorInfo,
- bool MatchingInlineAsm) override;
+ bool ParseDirective(AsmToken DirectiveID) override;
+ bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override;
+ bool ParseInstruction(ParseInstructionInfo &Info,
+ StringRef Name, SMLoc NameLoc,
+ SmallVectorImpl<MCParsedAsmOperand*> &Operands)
+ override;
+ bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
+ SmallVectorImpl<MCParsedAsmOperand*> &Operands,
+ MCStreamer &Out, unsigned &ErrorInfo,
+ bool MatchingInlineAsm) override;
// Used by the TableGen code to parse particular operand types.
OperandMatchResultTy
Modified: llvm/trunk/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp Thu Mar 6 06:03:36 2014
@@ -27,12 +27,10 @@ public:
virtual ~SystemZDisassembler() {}
// Override MCDisassembler.
- virtual DecodeStatus getInstruction(MCInst &instr,
- uint64_t &size,
- const MemoryObject ®ion,
- uint64_t address,
- raw_ostream &vStream,
- raw_ostream &cStream) const override;
+ DecodeStatus getInstruction(MCInst &instr, uint64_t &size,
+ const MemoryObject ®ion, uint64_t address,
+ raw_ostream &vStream,
+ raw_ostream &cStream) const override;
};
} // end anonymous namespace
Modified: llvm/trunk/lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.h?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.h (original)
+++ llvm/trunk/lib/Target/SystemZ/InstPrinter/SystemZInstPrinter.h Thu Mar 6 06:03:36 2014
@@ -38,9 +38,8 @@ public:
static void printOperand(const MCOperand &MO, raw_ostream &O);
// Override MCInstPrinter.
- virtual void printRegName(raw_ostream &O, unsigned RegNo) const override;
- virtual void printInst(const MCInst *MI, raw_ostream &O,
- StringRef Annot) override;
+ void printRegName(raw_ostream &O, unsigned RegNo) const override;
+ void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) override;
private:
// Print various types of operand.
Modified: llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp Thu Mar 6 06:03:36 2014
@@ -43,28 +43,25 @@ public:
: OSABI(osABI) {}
// Override MCAsmBackend
- virtual unsigned getNumFixupKinds() const override {
+ unsigned getNumFixupKinds() const override {
return SystemZ::NumTargetFixupKinds;
}
- virtual const MCFixupKindInfo &
- getFixupKindInfo(MCFixupKind Kind) const override;
- virtual void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
- uint64_t Value) const override;
- virtual bool mayNeedRelaxation(const MCInst &Inst) const override {
+ const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
+ void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
+ uint64_t Value) const override;
+ bool mayNeedRelaxation(const MCInst &Inst) const override {
return false;
}
- virtual bool fixupNeedsRelaxation(const MCFixup &Fixup,
- uint64_t Value,
- const MCRelaxableFragment *Fragment,
- const MCAsmLayout &Layout) const override {
+ bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
+ const MCRelaxableFragment *Fragment,
+ const MCAsmLayout &Layout) const override {
return false;
}
- virtual void relaxInstruction(const MCInst &Inst,
- MCInst &Res) const override {
+ void relaxInstruction(const MCInst &Inst, MCInst &Res) const override {
llvm_unreachable("SystemZ does do not have assembler relaxation");
}
- virtual bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override;
- virtual MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
+ bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override;
+ MCObjectWriter *createObjectWriter(raw_ostream &OS) const override {
return createSystemZObjectWriter(OS, OSABI);
}
};
Modified: llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h (original)
+++ llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h Thu Mar 6 06:03:36 2014
@@ -21,8 +21,7 @@ public:
explicit SystemZMCAsmInfo(StringRef TT);
// Override MCAsmInfo;
- virtual const MCSection *
- getNonexecutableStackSection(MCContext &Ctx) const override;
+ const MCSection *getNonexecutableStackSection(MCContext &Ctx) const override;
};
} // end namespace llvm
Modified: llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp Thu Mar 6 06:03:36 2014
@@ -34,9 +34,9 @@ public:
~SystemZMCCodeEmitter() {}
// OVerride MCCodeEmitter.
- virtual void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
- SmallVectorImpl<MCFixup> &Fixups,
- const MCSubtargetInfo &STI) const override;
+ void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+ SmallVectorImpl<MCFixup> &Fixups,
+ const MCSubtargetInfo &STI) const override;
private:
// Automatically generated by TableGen.
Modified: llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCObjectWriter.cpp Thu Mar 6 06:03:36 2014
@@ -24,14 +24,12 @@ public:
protected:
// Override MCELFObjectTargetWriter.
- virtual unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,
- bool IsPCRel, bool IsRelocWithSymbol,
- int64_t Addend) const override;
- virtual const MCSymbol *ExplicitRelSym(const MCAssembler &Asm,
- const MCValue &Target,
- const MCFragment &F,
- const MCFixup &Fixup,
- bool IsPCRel) const override;
+ unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,
+ bool IsPCRel, bool IsRelocWithSymbol,
+ int64_t Addend) const override;
+ const MCSymbol *ExplicitRelSym(const MCAssembler &Asm, const MCValue &Target,
+ const MCFragment &F, const MCFixup &Fixup,
+ bool IsPCRel) const override;
};
} // end anonymous namespace
Modified: llvm/trunk/lib/Target/SystemZ/SystemZAsmPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZAsmPrinter.h?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZAsmPrinter.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZAsmPrinter.h Thu Mar 6 06:03:36 2014
@@ -32,20 +32,18 @@ public:
}
// Override AsmPrinter.
- virtual const char *getPassName() const override {
+ const char *getPassName() const override {
return "SystemZ Assembly Printer";
}
- virtual void EmitInstruction(const MachineInstr *MI) override;
- virtual void
- EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) override;
- virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
- unsigned AsmVariant, const char *ExtraCode,
- raw_ostream &OS) override;
- virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
- unsigned AsmVariant,
- const char *ExtraCode,
- raw_ostream &OS) override;
- virtual void EmitEndOfAsmFile(Module &M) override;
+ void EmitInstruction(const MachineInstr *MI) override;
+ void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) override;
+ bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
+ unsigned AsmVariant, const char *ExtraCode,
+ raw_ostream &OS) override;
+ bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
+ unsigned AsmVariant, const char *ExtraCode,
+ raw_ostream &OS) override;
+ void EmitEndOfAsmFile(Module &M) override;
};
} // end namespace llvm
Modified: llvm/trunk/lib/Target/SystemZ/SystemZConstantPoolValue.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZConstantPoolValue.h?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZConstantPoolValue.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZConstantPoolValue.h Thu Mar 6 06:03:36 2014
@@ -39,11 +39,11 @@ public:
Create(const GlobalValue *GV, SystemZCP::SystemZCPModifier Modifier);
// Override MachineConstantPoolValue.
- virtual unsigned getRelocationInfo() const override;
- virtual int getExistingMachineCPValue(MachineConstantPool *CP,
- unsigned Alignment) override;
- virtual void addSelectionDAGCSEId(FoldingSetNodeID &ID) override;
- virtual void print(raw_ostream &O) const override;
+ unsigned getRelocationInfo() const override;
+ int getExistingMachineCPValue(MachineConstantPool *CP,
+ unsigned Alignment) override;
+ void addSelectionDAGCSEId(FoldingSetNodeID &ID) override;
+ void print(raw_ostream &O) const override;
// Access SystemZ-specific fields.
const GlobalValue *getGlobalValue() const { return GV; }
Modified: llvm/trunk/lib/Target/SystemZ/SystemZElimCompare.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZElimCompare.cpp?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZElimCompare.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZElimCompare.cpp Thu Mar 6 06:03:36 2014
@@ -66,7 +66,7 @@ public:
SystemZElimCompare(const SystemZTargetMachine &tm)
: MachineFunctionPass(ID), TII(0), TRI(0) {}
- virtual const char *getPassName() const {
+ const char *getPassName() const override {
return "SystemZ Comparison Elimination";
}
Modified: llvm/trunk/lib/Target/SystemZ/SystemZFrameLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZFrameLowering.h?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZFrameLowering.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZFrameLowering.h Thu Mar 6 06:03:36 2014
@@ -30,36 +30,31 @@ public:
const SystemZSubtarget &sti);
// Override TargetFrameLowering.
- virtual bool isFPCloseToIncomingSP() const override { return false; }
- virtual const SpillSlot *
- getCalleeSavedSpillSlots(unsigned &NumEntries) const override;
- virtual void
- processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
- RegScavenger *RS) const override;
- virtual bool
- spillCalleeSavedRegisters(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI,
- const std::vector<CalleeSavedInfo> &CSI,
- const TargetRegisterInfo *TRI) const
+ bool isFPCloseToIncomingSP() const override { return false; }
+ const SpillSlot *getCalleeSavedSpillSlots(unsigned &NumEntries) const
+ override;
+ void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
+ RegScavenger *RS) const override;
+ bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ const std::vector<CalleeSavedInfo> &CSI,
+ const TargetRegisterInfo *TRI) const override;
+ bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBII,
+ const std::vector<CalleeSavedInfo> &CSI,
+ const TargetRegisterInfo *TRI) const
+ override;
+ void processFunctionBeforeFrameFinalized(MachineFunction &MF,
+ RegScavenger *RS) const override;
+ void emitPrologue(MachineFunction &MF) const override;
+ void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
+ bool hasFP(const MachineFunction &MF) const override;
+ int getFrameIndexOffset(const MachineFunction &MF, int FI) const override;
+ bool hasReservedCallFrame(const MachineFunction &MF) const override;
+ void eliminateCallFramePseudoInstr(MachineFunction &MF,
+ MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI) const
override;
- virtual bool
- restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBII,
- const std::vector<CalleeSavedInfo> &CSI,
- const TargetRegisterInfo *TRI) const override;
- virtual void processFunctionBeforeFrameFinalized(MachineFunction &MF,
- RegScavenger *RS) const;
- virtual void emitPrologue(MachineFunction &MF) const override;
- virtual void emitEpilogue(MachineFunction &MF,
- MachineBasicBlock &MBB) const override;
- virtual bool hasFP(const MachineFunction &MF) const override;
- virtual int getFrameIndexOffset(const MachineFunction &MF,
- int FI) const override;
- virtual bool hasReservedCallFrame(const MachineFunction &MF) const override;
- virtual void
- eliminateCallFramePseudoInstr(MachineFunction &MF,
- MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MI) const override;
// Return the number of bytes in the callee-allocated part of the frame.
uint64_t getAllocatedStackSize(const MachineFunction &MF) const;
Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp Thu Mar 6 06:03:36 2014
@@ -318,15 +318,14 @@ public:
Subtarget(*TM.getSubtargetImpl()) { }
// Override MachineFunctionPass.
- virtual const char *getPassName() const override {
+ const char *getPassName() const override {
return "SystemZ DAG->DAG Pattern Instruction Selection";
}
// Override SelectionDAGISel.
- virtual SDNode *Select(SDNode *Node) override;
- virtual bool
- SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
- std::vector<SDValue> &OutOps) override;
+ SDNode *Select(SDNode *Node) override;
+ bool SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
+ std::vector<SDValue> &OutOps) override;
// Include the pieces autogenerated from the target description.
#include "SystemZGenDAGISel.inc"
Modified: llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZISelLowering.h Thu Mar 6 06:03:36 2014
@@ -201,57 +201,50 @@ public:
explicit SystemZTargetLowering(SystemZTargetMachine &TM);
// Override TargetLowering.
- virtual MVT getScalarShiftAmountTy(EVT LHSTy) const override {
+ MVT getScalarShiftAmountTy(EVT LHSTy) const override {
return MVT::i32;
}
- virtual EVT getSetCCResultType(LLVMContext &, EVT) const override;
- virtual bool isFMAFasterThanFMulAndFAdd(EVT VT) const override;
- virtual bool isFPImmLegal(const APFloat &Imm, EVT VT) const override;
- virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
- virtual bool
- allowsUnalignedMemoryAccesses(EVT VT, unsigned AS,
- bool *Fast) const override;
- virtual bool isTruncateFree(Type *, Type *) const override;
- virtual bool isTruncateFree(EVT, EVT) const override;
- virtual const char *getTargetNodeName(unsigned Opcode) const override;
- virtual std::pair<unsigned, const TargetRegisterClass *>
+ EVT getSetCCResultType(LLVMContext &, EVT) const override;
+ bool isFMAFasterThanFMulAndFAdd(EVT VT) const override;
+ bool isFPImmLegal(const APFloat &Imm, EVT VT) const override;
+ bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
+ bool allowsUnalignedMemoryAccesses(EVT VT, unsigned AS,
+ bool *Fast) const override;
+ bool isTruncateFree(Type *, Type *) const override;
+ bool isTruncateFree(EVT, EVT) const override;
+ const char *getTargetNodeName(unsigned Opcode) const override;
+ std::pair<unsigned, const TargetRegisterClass *>
getRegForInlineAsmConstraint(const std::string &Constraint,
MVT VT) const override;
- virtual TargetLowering::ConstraintType
+ TargetLowering::ConstraintType
getConstraintType(const std::string &Constraint) const override;
- virtual TargetLowering::ConstraintWeight
+ TargetLowering::ConstraintWeight
getSingleConstraintMatchWeight(AsmOperandInfo &info,
const char *constraint) const override;
- virtual void
- LowerAsmOperandForConstraint(SDValue Op,
- std::string &Constraint,
- std::vector<SDValue> &Ops,
- SelectionDAG &DAG) const override;
- virtual MachineBasicBlock *
- EmitInstrWithCustomInserter(MachineInstr *MI,
- MachineBasicBlock *BB) const override;
- virtual SDValue LowerOperation(SDValue Op,
- SelectionDAG &DAG) const override;
- virtual bool allowTruncateForTailCall(Type *, Type *) const override;
- virtual bool mayBeEmittedAsTailCall(CallInst *CI) const override;
- virtual SDValue
- LowerFormalArguments(SDValue Chain,
- CallingConv::ID CallConv, bool isVarArg,
- const SmallVectorImpl<ISD::InputArg> &Ins,
- SDLoc DL, SelectionDAG &DAG,
- SmallVectorImpl<SDValue> &InVals) const override;
- virtual SDValue
- LowerCall(CallLoweringInfo &CLI,
- SmallVectorImpl<SDValue> &InVals) const override;
+ void LowerAsmOperandForConstraint(SDValue Op,
+ std::string &Constraint,
+ std::vector<SDValue> &Ops,
+ SelectionDAG &DAG) const override;
+ MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,
+ MachineBasicBlock *BB) const
+ override;
+ SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
+ bool allowTruncateForTailCall(Type *, Type *) const override;
+ bool mayBeEmittedAsTailCall(CallInst *CI) const override;
+ SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
+ bool isVarArg,
+ const SmallVectorImpl<ISD::InputArg> &Ins,
+ SDLoc DL, SelectionDAG &DAG,
+ SmallVectorImpl<SDValue> &InVals) const override;
+ SDValue LowerCall(CallLoweringInfo &CLI,
+ SmallVectorImpl<SDValue> &InVals) const override;
- virtual SDValue
- LowerReturn(SDValue Chain,
- CallingConv::ID CallConv, bool IsVarArg,
- const SmallVectorImpl<ISD::OutputArg> &Outs,
- const SmallVectorImpl<SDValue> &OutVals,
- SDLoc DL, SelectionDAG &DAG) const override;
- virtual SDValue prepareVolatileOrAtomicLoad(SDValue Chain, SDLoc DL,
- SelectionDAG &DAG) const override;
+ SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
+ const SmallVectorImpl<ISD::OutputArg> &Outs,
+ const SmallVectorImpl<SDValue> &OutVals,
+ SDLoc DL, SelectionDAG &DAG) const override;
+ SDValue prepareVolatileOrAtomicLoad(SDValue Chain, SDLoc DL,
+ SelectionDAG &DAG) const override;
private:
const SystemZSubtarget &Subtarget;
Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.h Thu Mar 6 06:03:36 2014
@@ -133,75 +133,63 @@ public:
explicit SystemZInstrInfo(SystemZTargetMachine &TM);
// Override TargetInstrInfo.
- virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
- int &FrameIndex) const override;
- virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
- int &FrameIndex) const override;
- virtual bool isStackSlotCopy(const MachineInstr *MI, int &DestFrameIndex,
- int &SrcFrameIndex) const override;
- virtual bool AnalyzeBranch(MachineBasicBlock &MBB,
- MachineBasicBlock *&TBB,
- MachineBasicBlock *&FBB,
- SmallVectorImpl<MachineOperand> &Cond,
- bool AllowModify) const override;
- virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
- virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
- MachineBasicBlock *FBB,
- const SmallVectorImpl<MachineOperand> &Cond,
- DebugLoc DL) const override;
+ unsigned isLoadFromStackSlot(const MachineInstr *MI,
+ int &FrameIndex) const override;
+ unsigned isStoreToStackSlot(const MachineInstr *MI,
+ int &FrameIndex) const override;
+ bool isStackSlotCopy(const MachineInstr *MI, int &DestFrameIndex,
+ int &SrcFrameIndex) const override;
+ bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
+ MachineBasicBlock *&FBB,
+ SmallVectorImpl<MachineOperand> &Cond,
+ bool AllowModify) const override;
+ unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
+ unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
+ MachineBasicBlock *FBB,
+ const SmallVectorImpl<MachineOperand> &Cond,
+ DebugLoc DL) const override;
bool analyzeCompare(const MachineInstr *MI, unsigned &SrcReg,
unsigned &SrcReg2, int &Mask, int &Value) const override;
bool optimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg,
unsigned SrcReg2, int Mask, int Value,
const MachineRegisterInfo *MRI) const override;
- virtual bool isPredicable(MachineInstr *MI) const override;
- virtual bool
- isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
- unsigned ExtraPredCycles,
- const BranchProbability &Probability) const override;
- virtual bool
- isProfitableToIfCvt(MachineBasicBlock &TMBB,
- unsigned NumCyclesT,
- unsigned ExtraPredCyclesT,
- MachineBasicBlock &FMBB,
- unsigned NumCyclesF,
- unsigned ExtraPredCyclesF,
- const BranchProbability &Probability) const override;
- virtual bool
- PredicateInstruction(MachineInstr *MI,
- const SmallVectorImpl<MachineOperand> &Pred) const override;
- virtual void copyPhysReg(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI, DebugLoc DL,
- unsigned DestReg, unsigned SrcReg,
- bool KillSrc) const override;
- virtual void
- storeRegToStackSlot(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI,
- unsigned SrcReg, bool isKill, int FrameIndex,
- const TargetRegisterClass *RC,
- const TargetRegisterInfo *TRI) const override;
- virtual void
- loadRegFromStackSlot(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI,
- unsigned DestReg, int FrameIdx,
- const TargetRegisterClass *RC,
- const TargetRegisterInfo *TRI) const override;
- virtual MachineInstr *
- convertToThreeAddress(MachineFunction::iterator &MFI,
- MachineBasicBlock::iterator &MBBI,
- LiveVariables *LV) const;
- virtual MachineInstr *
- foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI,
- const SmallVectorImpl<unsigned> &Ops,
- int FrameIndex) const;
- virtual MachineInstr *
- foldMemoryOperandImpl(MachineFunction &MF, MachineInstr* MI,
- const SmallVectorImpl<unsigned> &Ops,
- MachineInstr* LoadMI) const;
- virtual bool
- expandPostRAPseudo(MachineBasicBlock::iterator MBBI) const override;
- virtual bool
- ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
+ bool isPredicable(MachineInstr *MI) const override;
+ bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
+ unsigned ExtraPredCycles,
+ const BranchProbability &Probability) const override;
+ bool isProfitableToIfCvt(MachineBasicBlock &TMBB,
+ unsigned NumCyclesT, unsigned ExtraPredCyclesT,
+ MachineBasicBlock &FMBB,
+ unsigned NumCyclesF, unsigned ExtraPredCyclesF,
+ const BranchProbability &Probability) const override;
+ bool PredicateInstruction(MachineInstr *MI,
+ const SmallVectorImpl<MachineOperand> &Pred) const
+ override;
+ void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
+ DebugLoc DL, unsigned DestReg, unsigned SrcReg,
+ bool KillSrc) const override;
+ void storeRegToStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ unsigned SrcReg, bool isKill, int FrameIndex,
+ const TargetRegisterClass *RC,
+ const TargetRegisterInfo *TRI) const override;
+ void loadRegFromStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ unsigned DestReg, int FrameIdx,
+ const TargetRegisterClass *RC,
+ const TargetRegisterInfo *TRI) const override;
+ MachineInstr *convertToThreeAddress(MachineFunction::iterator &MFI,
+ MachineBasicBlock::iterator &MBBI,
+ LiveVariables *LV) const override;
+ MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr *MI,
+ const SmallVectorImpl<unsigned> &Ops,
+ int FrameIndex) const override;
+ MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr* MI,
+ const SmallVectorImpl<unsigned> &Ops,
+ MachineInstr* LoadMI) const override;
+ bool expandPostRAPseudo(MachineBasicBlock::iterator MBBI) const override;
+ bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const
+ override;
// Return the SystemZRegisterInfo, which this class owns.
const SystemZRegisterInfo &getRegisterInfo() const { return RI; }
Modified: llvm/trunk/lib/Target/SystemZ/SystemZLongBranch.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZLongBranch.cpp?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZLongBranch.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZLongBranch.cpp Thu Mar 6 06:03:36 2014
@@ -133,7 +133,7 @@ public:
SystemZLongBranch(const SystemZTargetMachine &tm)
: MachineFunctionPass(ID), TII(0) {}
- virtual const char *getPassName() const {
+ const char *getPassName() const override {
return "SystemZ Long Branch";
}
Modified: llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZRegisterInfo.h Thu Mar 6 06:03:36 2014
@@ -40,25 +40,22 @@ public:
SystemZRegisterInfo(SystemZTargetMachine &tm);
// Override TargetRegisterInfo.h.
- virtual bool
- requiresRegisterScavenging(const MachineFunction &MF) const override {
+ bool requiresRegisterScavenging(const MachineFunction &MF) const override {
return true;
}
- virtual bool
- requiresFrameIndexScavenging(const MachineFunction &MF) const override {
+ bool requiresFrameIndexScavenging(const MachineFunction &MF) const override {
return true;
}
- virtual bool
- trackLivenessAfterRegAlloc(const MachineFunction &MF) const override {
+ bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override {
return true;
}
- virtual const uint16_t *
- getCalleeSavedRegs(const MachineFunction *MF = 0) const override;
- virtual BitVector getReservedRegs(const MachineFunction &MF) const override;
- virtual void eliminateFrameIndex(MachineBasicBlock::iterator MI,
- int SPAdj, unsigned FIOperandNum,
- RegScavenger *RS) const override;
- virtual unsigned getFrameRegister(const MachineFunction &MF) const override;
+ const uint16_t *getCalleeSavedRegs(const MachineFunction *MF = 0) const
+ override;
+ BitVector getReservedRegs(const MachineFunction &MF) const override;
+ void eliminateFrameIndex(MachineBasicBlock::iterator MI,
+ int SPAdj, unsigned FIOperandNum,
+ RegScavenger *RS) const override;
+ unsigned getFrameRegister(const MachineFunction &MF) const override;
};
} // end namespace llvm
Modified: llvm/trunk/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZSelectionDAGInfo.h?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZSelectionDAGInfo.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZSelectionDAGInfo.h Thu Mar 6 06:03:36 2014
@@ -25,7 +25,6 @@ public:
explicit SystemZSelectionDAGInfo(const SystemZTargetMachine &TM);
~SystemZSelectionDAGInfo();
- virtual
SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, SDLoc DL, SDValue Chain,
SDValue Dst, SDValue Src,
SDValue Size, unsigned Align,
@@ -33,42 +32,41 @@ public:
MachinePointerInfo DstPtrInfo,
MachinePointerInfo SrcPtrInfo) const override;
- virtual SDValue
- EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc DL,
- SDValue Chain, SDValue Dst, SDValue Byte,
- SDValue Size, unsigned Align, bool IsVolatile,
- MachinePointerInfo DstPtrInfo) const override;
+ SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, SDLoc DL,
+ SDValue Chain, SDValue Dst, SDValue Byte,
+ SDValue Size, unsigned Align, bool IsVolatile,
+ MachinePointerInfo DstPtrInfo) const override;
- virtual std::pair<SDValue, SDValue>
+ std::pair<SDValue, SDValue>
EmitTargetCodeForMemcmp(SelectionDAG &DAG, SDLoc DL, SDValue Chain,
SDValue Src1, SDValue Src2, SDValue Size,
MachinePointerInfo Op1PtrInfo,
MachinePointerInfo Op2PtrInfo) const override;
- virtual std::pair<SDValue, SDValue>
+ std::pair<SDValue, SDValue>
EmitTargetCodeForMemchr(SelectionDAG &DAG, SDLoc DL, SDValue Chain,
SDValue Src, SDValue Char, SDValue Length,
MachinePointerInfo SrcPtrInfo) const override;
- virtual std::pair<SDValue, SDValue>
+ std::pair<SDValue, SDValue>
EmitTargetCodeForStrcpy(SelectionDAG &DAG, SDLoc DL, SDValue Chain,
SDValue Dest, SDValue Src,
MachinePointerInfo DestPtrInfo,
MachinePointerInfo SrcPtrInfo,
bool isStpcpy) const override;
- virtual std::pair<SDValue, SDValue>
+ std::pair<SDValue, SDValue>
EmitTargetCodeForStrcmp(SelectionDAG &DAG, SDLoc DL, SDValue Chain,
SDValue Src1, SDValue Src2,
MachinePointerInfo Op1PtrInfo,
MachinePointerInfo Op2PtrInfo) const override;
- virtual std::pair<SDValue, SDValue>
+ std::pair<SDValue, SDValue>
EmitTargetCodeForStrlen(SelectionDAG &DAG, SDLoc DL, SDValue Chain,
SDValue Src,
MachinePointerInfo SrcPtrInfo) const override;
- virtual std::pair<SDValue, SDValue>
+ std::pair<SDValue, SDValue>
EmitTargetCodeForStrnlen(SelectionDAG &DAG, SDLoc DL, SDValue Chain,
SDValue Src, SDValue MaxLength,
MachinePointerInfo SrcPtrInfo) const override;
Modified: llvm/trunk/lib/Target/SystemZ/SystemZShortenInst.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZShortenInst.cpp?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZShortenInst.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZShortenInst.cpp Thu Mar 6 06:03:36 2014
@@ -26,7 +26,7 @@ public:
static char ID;
SystemZShortenInst(const SystemZTargetMachine &tm);
- virtual const char *getPassName() const {
+ const char *getPassName() const override {
return "SystemZ Instruction Shortening";
}
Modified: llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h Thu Mar 6 06:03:36 2014
@@ -43,7 +43,7 @@ public:
const std::string &FS);
// This is important for reducing register pressure in vector code.
- virtual bool useAA() const override { return true; }
+ bool useAA() const override { return true; }
// Automatically generated by tblgen.
void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
Modified: llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp Thu Mar 6 06:03:36 2014
@@ -47,10 +47,10 @@ public:
return getTM<SystemZTargetMachine>();
}
- virtual void addIRPasses() override;
- virtual bool addInstSelector() override;
- virtual bool addPreSched2() override;
- virtual bool addPreEmitPass() override;
+ void addIRPasses() override;
+ bool addInstSelector() override;
+ bool addPreSched2() override;
+ bool addPreEmitPass() override;
};
} // end anonymous namespace
Modified: llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h?rev=203110&r1=203109&r2=203110&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.h Thu Mar 6 06:03:36 2014
@@ -42,30 +42,30 @@ public:
CodeGenOpt::Level OL);
// Override TargetMachine.
- virtual const TargetFrameLowering *getFrameLowering() const override {
+ const TargetFrameLowering *getFrameLowering() const override {
return &FrameLowering;
}
- virtual const SystemZInstrInfo *getInstrInfo() const override {
+ const SystemZInstrInfo *getInstrInfo() const override {
return &InstrInfo;
}
- virtual const SystemZSubtarget *getSubtargetImpl() const override {
+ const SystemZSubtarget *getSubtargetImpl() const override {
return &Subtarget;
}
- virtual const DataLayout *getDataLayout() const override {
+ const DataLayout *getDataLayout() const override {
return &DL;
}
- virtual const SystemZRegisterInfo *getRegisterInfo() const override {
+ const SystemZRegisterInfo *getRegisterInfo() const override {
return &InstrInfo.getRegisterInfo();
}
- virtual const SystemZTargetLowering *getTargetLowering() const override {
+ const SystemZTargetLowering *getTargetLowering() const override {
return &TLInfo;
}
- virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const override {
+ const TargetSelectionDAGInfo *getSelectionDAGInfo() const override {
return &TSInfo;
}
// Override LLVMTargetMachine
- virtual TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
+ TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
};
} // end namespace llvm
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