[llvm] r203041 - When using CR bit registers on PPC32, handle the i1 vaarg case

[Hal Finkel]

Author: hfinkel
Date: Wed Mar  5 18:23:33 2014
New Revision: 203041

URL: http://llvm.org/viewvc/llvm-project?rev=203041&view=rev
Log:
When using CR bit registers on PPC32, handle the i1 vaarg case

When copying an i1 value into a GPR for a vaarg call, we need to explicitly
zero-extend the i1 value (otherwise an invalid CRBIT -> GPR copy will be
generated).

Added:
    llvm/trunk/test/CodeGen/PowerPC/ppc32-i1-vaarg.ll
Modified:
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=203041&r1=203040&r2=203041&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Wed Mar  5 18:23:33 2014
@@ -3773,6 +3773,9 @@ PPCTargetLowering::LowerCall_32SVR4(SDVa
     }
 
     if (VA.isRegLoc()) {
+      if (Arg.getValueType() == MVT::i1)
+        Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Arg);
+
       seenFloatArg |= VA.getLocVT().isFloatingPoint();
       // Put argument in a physical register.
       RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));

Added: llvm/trunk/test/CodeGen/PowerPC/ppc32-i1-vaarg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/ppc32-i1-vaarg.ll?rev=203041&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ppc32-i1-vaarg.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/ppc32-i1-vaarg.ll Wed Mar  5 18:23:33 2014
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=ppc32 -mcpu=ppc32 | FileCheck %s
+target triple = "powerpc-unknown-linux-gnu"
+
+declare void @printf(i8*, ...)
+
+define void @main() {
+  call void (i8*, ...)* @printf(i8* undef, i1 false)
+  ret void
+}
+
+; CHECK-LABEL: @main
+; CHECK-DAG li 4, 0
+; CHECK-DAG: crxor 6, 6, 6
+; CHECK: bl printf
+