[PATCH] Correctly align arguments after a byval struct is passed on the stack
Renato Golin
renato.golin at linaro.org
Wed Mar 5 00:51:48 PST 2014
Apart from the comments, and assuming the test-suite and the PCS tests all pass, LGTM.
cheers,
--renato
================
Comment at: lib/Target/ARM/ARMISelLowering.cpp:2942
@@ +2941,3 @@
+ if (VA.isMemLoc()) {
+ int index = ArgLocs[i].getValNo();
+ if (index != lastInsIndex) {
----------------
VA.getValNo()?
================
Comment at: lib/Target/ARM/ARMISelLowering.cpp:2974
@@ +2973,3 @@
+ if (TotalArgRegsSaveSize > 16)
+ TotalArgRegsSaveSize = 16;
+
----------------
Maybe we should use std::min(TotalArgRegsSaveSize, 16)?
================
Comment at: lib/Target/ARM/ARMISelLowering.cpp:3087
@@ -3039,1 +3086,3 @@
+ if (ByValStoreOffset > 16)
+ ByValStoreOffset = 16;
InVals.push_back(DAG.getFrameIndex(FrameIndex, getPointerTy()));
----------------
Here, too.
================
Comment at: test/CodeGen/ARM/2014-02-21-byval-reg-split-alignment.ll:54
@@ +53,3 @@
+; CHECK: add r3, sp, #8
+; CHECK: stm r3, {r0, r1, r2}
+; CHECK: add r0, sp, #8
----------------
This case, r3 could be a regular expression, as it's not guaranteed that llvm will always use the same scratch register.
================
Comment at: test/CodeGen/ARM/2014-02-21-byval-reg-split-alignment.ll:91
@@ +90,3 @@
+; CHECK: add r11, sp, #8
+; CHECK: stm r11, {r0, r1, r2, r3}
+; CHECK: add r0, sp, #8
----------------
This case, r3 could be a regular expression, as it's not guaranteed that llvm will always use the same scratch register.
http://llvm-reviews.chandlerc.com/D2933
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