[llvm] r202661 - [Sparc] Add fcmpe* instructions to Sparc backend.
Venkatraman Govindaraju
venkatra at cs.wisc.edu
Sun Mar 2 11:56:19 PST 2014
Author: venkatra
Date: Sun Mar 2 13:56:19 2014
New Revision: 202661
URL: http://llvm.org/viewvc/llvm-project?rev=202661&view=rev
Log:
[Sparc] Add fcmpe* instructions to Sparc backend.
Modified:
llvm/trunk/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp
llvm/trunk/lib/Target/Sparc/SparcInstrAliases.td
llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td
llvm/trunk/test/MC/Sparc/sparc-fp-instructions.s
llvm/trunk/test/MC/Sparc/sparcv8-instructions.s
Modified: llvm/trunk/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp?rev=202661&r1=202660&r2=202661&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp Sun Mar 2 13:56:19 2014
@@ -69,9 +69,8 @@ bool SparcInstPrinter::printSparcAliasIn
return true;
}
}
- case SP::V9FCMPS:
- case SP::V9FCMPD:
- case SP::V9FCMPQ: {
+ case SP::V9FCMPS: case SP::V9FCMPD: case SP::V9FCMPQ:
+ case SP::V9FCMPES: case SP::V9FCMPED: case SP::V9FCMPEQ: {
if (isV9()
|| (MI->getNumOperands() != 3)
|| (!MI->getOperand(0).isReg())
@@ -80,9 +79,12 @@ bool SparcInstPrinter::printSparcAliasIn
// if V8, skip printing %fcc0.
switch(MI->getOpcode()) {
default:
- case SP::V9FCMPS: O << "\tfcmps "; break;
- case SP::V9FCMPD: O << "\tfcmpd "; break;
- case SP::V9FCMPQ: O << "\tfcmpq "; break;
+ case SP::V9FCMPS: O << "\tfcmps "; break;
+ case SP::V9FCMPD: O << "\tfcmpd "; break;
+ case SP::V9FCMPQ: O << "\tfcmpq "; break;
+ case SP::V9FCMPES: O << "\tfcmpes "; break;
+ case SP::V9FCMPED: O << "\tfcmped "; break;
+ case SP::V9FCMPEQ: O << "\tfcmpeq "; break;
}
printOperand(MI, 1, O);
O << ", ";
Modified: llvm/trunk/lib/Target/Sparc/SparcInstrAliases.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcInstrAliases.td?rev=202661&r1=202660&r2=202661&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcInstrAliases.td (original)
+++ llvm/trunk/lib/Target/Sparc/SparcInstrAliases.td Sun Mar 2 13:56:19 2014
@@ -260,3 +260,10 @@ def : InstAlias<"fcmps $rs1, $rs2", (V9F
def : InstAlias<"fcmpd $rs1, $rs2", (V9FCMPD FCC0, DFPRegs:$rs1, DFPRegs:$rs2)>;
def : InstAlias<"fcmpq $rs1, $rs2", (V9FCMPQ FCC0, QFPRegs:$rs1, QFPRegs:$rs2)>,
Requires<[HasHardQuad]>;
+
+def : InstAlias<"fcmpes $rs1, $rs2", (V9FCMPES FCC0, FPRegs:$rs1, FPRegs:$rs2)>;
+def : InstAlias<"fcmped $rs1, $rs2", (V9FCMPED FCC0, DFPRegs:$rs1,
+ DFPRegs:$rs2)>;
+def : InstAlias<"fcmpeq $rs1, $rs2", (V9FCMPEQ FCC0, QFPRegs:$rs1,
+ QFPRegs:$rs2)>,
+ Requires<[HasHardQuad]>;
Modified: llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td?rev=202661&r1=202660&r2=202661&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Sparc/SparcInstrInfo.td Sun Mar 2 13:56:19 2014
@@ -1040,6 +1040,19 @@ def V9FCMPQ : F3_3c<2, 0b110101, 0b0010
"fcmpq $rd, $rs1, $rs2", []>,
Requires<[HasHardQuad]>;
+let hasSideEffects = 1 in {
+ def V9FCMPES : F3_3c<2, 0b110101, 0b001010101,
+ (outs FCCRegs:$rd), (ins FPRegs:$rs1, FPRegs:$rs2),
+ "fcmpes $rd, $rs1, $rs2", []>;
+ def V9FCMPED : F3_3c<2, 0b110101, 0b001010110,
+ (outs FCCRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+ "fcmped $rd, $rs1, $rs2", []>;
+ def V9FCMPEQ : F3_3c<2, 0b110101, 0b001010111,
+ (outs FCCRegs:$rd), (ins QFPRegs:$rs1, QFPRegs:$rs2),
+ "fcmpeq $rd, $rs1, $rs2", []>,
+ Requires<[HasHardQuad]>;
+}
+
// Floating point conditional move instrucitons with %fcc0-%fcc3.
let Predicates = [HasV9] in {
let Constraints = "$f = $rd", intcc = 0 in {
Modified: llvm/trunk/test/MC/Sparc/sparc-fp-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Sparc/sparc-fp-instructions.s?rev=202661&r1=202660&r2=202661&view=diff
==============================================================================
--- llvm/trunk/test/MC/Sparc/sparc-fp-instructions.s (original)
+++ llvm/trunk/test/MC/Sparc/sparc-fp-instructions.s Sun Mar 2 13:56:19 2014
@@ -103,6 +103,13 @@
fcmpd %f0, %f4
fcmpq %f0, %f4
+ ! CHECK: fcmpes %fcc0, %f0, %f4 ! encoding: [0x81,0xa8,0x0a,0xa4]
+ ! CHECK: fcmped %fcc0, %f0, %f4 ! encoding: [0x81,0xa8,0x0a,0xc4]
+ ! CHECK: fcmpeq %fcc0, %f0, %f4 ! encoding: [0x81,0xa8,0x0a,0xe4]
+ fcmpes %f0, %f4
+ fcmped %f0, %f4
+ fcmpeq %f0, %f4
+
! CHECK: fcmps %fcc2, %f0, %f4 ! encoding: [0x85,0xa8,0x0a,0x24]
! CHECK: fcmpd %fcc2, %f0, %f4 ! encoding: [0x85,0xa8,0x0a,0x44]
! CHECK: fcmpq %fcc2, %f0, %f4 ! encoding: [0x85,0xa8,0x0a,0x64]
@@ -110,6 +117,13 @@
fcmpd %fcc2, %f0, %f4
fcmpq %fcc2, %f0, %f4
+ ! CHECK: fcmpes %fcc2, %f0, %f4 ! encoding: [0x85,0xa8,0x0a,0xa4]
+ ! CHECK: fcmped %fcc2, %f0, %f4 ! encoding: [0x85,0xa8,0x0a,0xc4]
+ ! CHECK: fcmpeq %fcc2, %f0, %f4 ! encoding: [0x85,0xa8,0x0a,0xe4]
+ fcmpes %fcc2, %f0, %f4
+ fcmped %fcc2, %f0, %f4
+ fcmpeq %fcc2, %f0, %f4
+
! CHECK: fxtos %f0, %f4 ! encoding: [0x89,0xa0,0x10,0x80]
! CHECK: fxtod %f0, %f4 ! encoding: [0x89,0xa0,0x11,0x00]
! CHECK: fxtoq %f0, %f4 ! encoding: [0x89,0xa0,0x11,0x80]
Modified: llvm/trunk/test/MC/Sparc/sparcv8-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Sparc/sparcv8-instructions.s?rev=202661&r1=202660&r2=202661&view=diff
==============================================================================
--- llvm/trunk/test/MC/Sparc/sparcv8-instructions.s (original)
+++ llvm/trunk/test/MC/Sparc/sparcv8-instructions.s Sun Mar 2 13:56:19 2014
@@ -6,3 +6,10 @@
fcmps %f0, %f4
fcmpd %f0, %f4
fcmpq %f0, %f4
+
+ ! CHECK: fcmpes %f0, %f4 ! encoding: [0x81,0xa8,0x0a,0xa4]
+ ! CHECK: fcmped %f0, %f4 ! encoding: [0x81,0xa8,0x0a,0xc4]
+ ! CHECK: fcmpeq %f0, %f4 ! encoding: [0x81,0xa8,0x0a,0xe4]
+ fcmpes %f0, %f4
+ fcmped %f0, %f4
+ fcmpeq %f0, %f4
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