[llvm] r202369 - Stop test/CodeGen/X86/v4i32load-crash.ll targeting non-X86-64 targets.

[Daniel Sanders]

Author: dsanders
Date: Thu Feb 27 03:24:31 2014
New Revision: 202369

URL: http://llvm.org/viewvc/llvm-project?rev=202369&view=rev
Log:
Stop test/CodeGen/X86/v4i32load-crash.ll targeting non-X86-64 targets.

Summary:
Fixes an issue where a test attempts to use -mcpu=x86-64 on non-X86-64 targets.
This triggers an assertion in the MIPS backend since it doesn't know what ABI to
use by default for unrecognized processors.

CC: llvm-commits, rafael

Differential Revision: http://llvm-reviews.chandlerc.com/D2877

Modified:
    llvm/trunk/test/CodeGen/X86/v4i32load-crash.ll

Modified: llvm/trunk/test/CodeGen/X86/v4i32load-crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/v4i32load-crash.ll?rev=202369&r1=202368&r2=202369&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/v4i32load-crash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/v4i32load-crash.ll Thu Feb 27 03:24:31 2014
@@ -1,10 +1,11 @@
-; RUN: llc --mcpu=x86-64 --mattr=ssse3 < %s
+; RUN: llc --march=x86 --mcpu=x86-64 --mattr=ssse3 < %s
+; RUN: llc --march=x86-64 --mcpu=x86-64 --mattr=ssse3 < %s
 
 ;PR18045:
 ;Issue of selection for 'v4i32 load'.
 ;This instruction is not legal for X86 CPUs with sse < 'sse4.1'.
 ;This node was generated by X86ISelLowering.cpp, EltsFromConsecutiveLoads
-;static function after legilize stage.
+;static function after legalize stage.
 
 @e = external global [4 x i32], align 4
 @f = external global [4 x i32], align 4