[PATCH] AARCH64_BE load/store rules fix for ARM ABI
Tim Northover
t.p.northover at gmail.com
Wed Feb 26 02:31:26 PST 2014
t.p.northover added you to the CC list for the revision "AARCH64_BE load/store rules fix for ARM ABI".
Hi t.p.northover,
For Big Endian (BE) systems: Switch from LD1/ST1 loads to LDR/STR for NEON regs.
Apart from having better addressing modes and being specified in the ABI, LDR/STR do correct byte-swapping for BE, as opposed to the "element-swapping" taking place with LD1/ST1.
For Little Endian (LE), nothing changes in this step - although the shorter LDR/STR instructions should be enabled for LE as well - in LE, both instruction types do the same things and can be mixed.
For BE, initialization from literals must use vector load intrinsics - or the literals need to be rearranged before emit.
http://llvm-reviews.chandlerc.com/D2884
Files:
lib/Target/AArch64/AArch64InstrInfo.td
lib/Target/AArch64/AArch64InstrNEON.td
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D2884.1.patch
Type: text/x-patch
Size: 33842 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20140226/b3d5dac3/attachment.bin>
More information about the llvm-commits
mailing list