AARCH64_BE load/store rules fix to conform to ARM ABI

[Albrecht Kadlec]

M       lib/Target/AArch64/AArch64InstrInfo.td
M       lib/Target/AArch64/AArch64InstrNEON.td

There are 2 versions of the same diff:
Result of "svn diff" as usual - quite large due to indentation changes.
Result of "svn diff -x -w"  to provide better overview what actually 
changed.
The commit will have correct indentation.

Changes:
For Big Endian (BE) systems:
Switch from LD1/ST1 loads for NEON regs to LDR/STR.
Apart from having better addressing modes and being specified in the 
ABI, LDR/STR do correct byte-swapping for BE, as opposed to the 
"element-swapping" taking place with LD1/ST1.

For Little Endian (LE), nothing changes in this step - although the 
shorter LDR/STR instructions should be enabled for LE as well - in LE, 
both instruction types do the same things and can be mixed.

For BE, initialization from literals must use vector load intrinsics - 
or the literals need to be rearranged before emit.
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