[llvm] r201904 - [Stackmaps] Move the target-independent frame index elimination for stackmaps and patchpoints into target-specific code.

Juergen Ributzka juergen at apple.com
Fri Feb 21 15:29:33 PST 2014


Author: ributzka
Date: Fri Feb 21 17:29:32 2014
New Revision: 201904

URL: http://llvm.org/viewvc/llvm-project?rev=201904&view=rev
Log:
[Stackmaps] Move the target-independent frame index elimination for stackmaps and patchpoints into target-specific code.

The lowering of the frame index for stackmaps and patchpoints requires some
target-specific magic and should therefore be handled in the target-specific
eliminateFrameIndex method.

This is related to <rdar://problem/16106219>

Modified:
    llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
    llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp

Modified: llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp?rev=201904&r1=201903&r2=201904&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp (original)
+++ llvm/trunk/lib/CodeGen/PrologEpilogInserter.cpp Fri Feb 21 17:29:32 2014
@@ -779,18 +779,15 @@ void PEI::replaceFrameIndices(MachineBas
       // Frame indicies in debug values are encoded in a target independent
       // way with simply the frame index and offset rather than any
       // target-specific addressing mode.
-      if (MI->isDebugValue() ||
-          MI->getOpcode() == TargetOpcode::STACKMAP ||
-          MI->getOpcode() == TargetOpcode::PATCHPOINT) {
-        assert((!MI->isDebugValue() || i == 0) &&
-               "Frame indicies can only appear as the first operand of a "
-               "DBG_VALUE machine instruction");
+      if (MI->isDebugValue()) {
+        assert(i == 0 && "Frame indicies can only appear as the first "
+                         "operand of a DBG_VALUE machine instruction");
         unsigned Reg;
-        MachineOperand &Offset = MI->getOperand(i + 1);
+        MachineOperand &Offset = MI->getOperand(1);
         Offset.setImm(Offset.getImm() +
                       TFI->getFrameIndexReference(
-                          Fn, MI->getOperand(i).getIndex(), Reg));
-        MI->getOperand(i).ChangeToRegister(Reg, false /*isDef*/);
+                          Fn, MI->getOperand(0).getIndex(), Reg));
+        MI->getOperand(0).ChangeToRegister(Reg, false /*isDef*/);
         continue;
       }
 

Modified: llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp?rev=201904&r1=201903&r2=201904&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86RegisterInfo.cpp Fri Feb 21 17:29:32 2014
@@ -516,6 +516,15 @@ X86RegisterInfo::eliminateFrameIndex(Mac
   } else
     FIOffset = TFI->getFrameIndexOffset(MF, FrameIndex);
 
+  // The frame index format for stackmaps and patchpoints is different from the
+  // X86 format. It only has a FI and an offset.
+  if (Opc == TargetOpcode::STACKMAP || Opc == TargetOpcode::PATCHPOINT) {
+    assert(BasePtr == FramePtr && "Expected the FP as base register");
+    int64_t Offset = MI.getOperand(FIOperandNum + 1).getImm() + FIOffset;
+    MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
+    return;
+  }
+
   if (MI.getOperand(FIOperandNum+3).isImm()) {
     // Offset is a 32-bit integer.
     int Imm = (int)(MI.getOperand(FIOperandNum + 3).getImm());





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