[PATCH] Generic support for sub/super registers in AsmPrinter::EmitDwarfRegOp()

[Iain Sandoe]

Hi Adrian,

Apologies: not had much time to apply to this - but re-tried a few cases, on 501600 + your three patches.

On 18 Feb 2014, at 17:38, Adrian Prantl wrote:

> Here is some additional context to help with the review. I posted three patches in the last 2 weeks that all use some form of DW_OP_piece to deal with partial variables and/or subregisters:

I've been trying to get some trivial test-cases to expose the various behaviour on x86-64-darwin12 (10.8.5), but without much evident success.

If you have some local tests that could be attached, they would very helpful.

> 1) A small variable is in a subregister (e.g.: eax on x86_64) that is not representable in DWARF.
>   Can represent this using a DW_OP_piece of a representable superregister (e.g.: rax) in DWARF.
>   Committed in r201190 ( http://llvm.org/viewvc/llvm-project?rev=201190&view=rev )

I'd expect this to show with "-O1 -g" on x86-64.
And it seems to work partially (although it gives failure @DwarfUnit:554 - with an unknown opcode value == 3).

long foo (int a, long long b, int c)
{
  int x = a + c;
  long long y = x + b;
  return y;

> 2) A larger variable is in a superregister (e.g.: Q0 on ARM) that is not representable in DWARF.
>   Can represent this using multiple DW_OP_pieces stored in representable subregisters (e.g.: D0+D1) in DWARF.
>   This is the patch attached to this thread.


I might expect this to show on x86 :

long long foo (long long a, long long b, long long c)
{
  long long res = c;
  if ( a == b )
    return res;
  return res+b;
}

[X86-64,  -m32 -O1 -g : shows blocks of insns that are operating on the fragments]

There is no register loc info being produces, but I think that this is what we discussed on irc - that the splitting is being done in ISel, and is not seen by the code so far.

cheers
Iain

> 3) A large (aggregate) variable is split up across multiple unrelated registers, e.g, during SROA.
>   Can represent this using multiple DW_OP_pieces in DWARF.
>   Ready for review over here: http://llvm-reviews.chandlerc.com/D2680.
> 
> The confusing part IMO is that the same operation DW_OP_piece is used to mean both a piece of a large variable in a small register _and_ a small variable occupying part of a large register. (Side-note: yes, these situations can happen simultaneously, this is where DW_OP_shr comes in).
> 
> -- adrian
> 
> On Feb 14, 2014, at 19:54, Adrian Prantl <aprantl at apple.com> wrote:
> 
>> Earlier this week (r201190) I added generic support for super-registers in AsmPrinter::EmitDwarfRegOp(). This patch does the opposite, by substituting multiple sub-registers for super-registers without valid DWARF numbers. The result is general enough that we can get rid of ARMAsmPrinter::EmitDwarfRegOp().
>> 
>> While I think this patch is rather uncontroversial; it is removing code, so I’m posting this for review first.
>> 
>> thanks,
>> adrian
>> 
>> PS: these two patches also from the basis for the updated revision of http://llvm-reviews.chandlerc.com/D2680 I just uploaded.
>> <0001-Debug-info-Refactor-AsmPrinter-EmitDwarfRegOp-to-mak.patch><0002-Debug-info-Remove-ARMAsmPrinter-EmitDwarfRegOp-.-Asm.patch>_______________________________________________
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