[llvm] r201601 - [AArch64] Expanded sin, cos, pow with FP vector types inputs
Ana Pazos
apazos at codeaurora.org
Tue Feb 18 12:31:06 PST 2014
Author: apazos
Date: Tue Feb 18 14:31:05 2014
New Revision: 201601
URL: http://llvm.org/viewvc/llvm-project?rev=201601&view=rev
Log:
[AArch64] Expanded sin, cos, pow with FP vector types inputs
Added:
llvm/trunk/test/CodeGen/AArch64/sincospow-vector-expansion.ll
Modified:
llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=201601&r1=201600&r2=201601&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Tue Feb 18 14:31:05 2014
@@ -520,6 +520,16 @@ AArch64TargetLowering::AArch64TargetLowe
// do such optimization in the future.
setOperationAction(ISD::MUL, MVT::v1i64, Expand);
setOperationAction(ISD::MUL, MVT::v2i64, Expand);
+
+ setOperationAction(ISD::FCOS, MVT::v2f64, Expand);
+ setOperationAction(ISD::FCOS, MVT::v4f32, Expand);
+ setOperationAction(ISD::FCOS, MVT::v2f32, Expand);
+ setOperationAction(ISD::FSIN, MVT::v2f64, Expand);
+ setOperationAction(ISD::FSIN, MVT::v4f32, Expand);
+ setOperationAction(ISD::FSIN, MVT::v2f32, Expand);
+ setOperationAction(ISD::FPOW, MVT::v2f64, Expand);
+ setOperationAction(ISD::FPOW, MVT::v4f32, Expand);
+ setOperationAction(ISD::FPOW, MVT::v2f32, Expand);
}
setTargetDAGCombine(ISD::SETCC);
Added: llvm/trunk/test/CodeGen/AArch64/sincospow-vector-expansion.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/sincospow-vector-expansion.ll?rev=201601&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/sincospow-vector-expansion.ll (added)
+++ llvm/trunk/test/CodeGen/AArch64/sincospow-vector-expansion.ll Tue Feb 18 14:31:05 2014
@@ -0,0 +1,96 @@
+; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
+
+
+define <2 x float> @test_cos_v2f64(<2 x double> %v1) {
+; CHECK-LABEL: test_cos_v2f64:
+; CHECK: bl cos
+; CHECK: bl cos
+ %1 = call <2 x double> @llvm.cos.v2f64(<2 x double> %v1)
+ %2 = fptrunc <2 x double> %1 to <2 x float>
+ ret <2 x float> %2
+}
+
+define <2 x float> @test_sin_v2f64(<2 x double> %v1) {
+; CHECK-LABEL: test_sin_v2f64:
+; CHECK: bl sin
+; CHECK: bl sin
+ %1 = call <2 x double> @llvm.sin.v2f64(<2 x double> %v1)
+ %2 = fptrunc <2 x double> %1 to <2 x float>
+ ret <2 x float> %2
+}
+
+define <2 x float> @test_pow_v2f64(<2 x double> %v1, <2 x double> %v2) {
+; CHECK-LABEL: test_pow_v2f64:
+; CHECK: bl pow
+; CHECK: bl pow
+ %1 = call <2 x double> @llvm.pow.v2f64(<2 x double> %v1, <2 x double> %v2)
+ %2 = fptrunc <2 x double> %1 to <2 x float>
+ ret <2 x float> %2
+}
+
+declare <2 x double> @llvm.cos.v2f64(<2 x double>)
+declare <2 x double> @llvm.sin.v2f64(<2 x double>)
+declare <2 x double> @llvm.pow.v2f64(<2 x double>, <2 x double>)
+
+define <2 x float> @test_cos_v2f32(<2 x float> %v1) {
+; CHECK-LABEL: test_cos_v2f32:
+; CHECK: bl cos
+; CHECK: bl cos
+ %1 = call <2 x float> @llvm.cos.v2f32(<2 x float> %v1)
+ ret <2 x float> %1
+}
+
+define <2 x float> @test_sin_v2f32(<2 x float> %v1) {
+; CHECK-LABEL: test_sin_v2f32:
+; CHECK: bl sin
+; CHECK: bl sin
+ %1 = call <2 x float> @llvm.sin.v2f32(<2 x float> %v1)
+ ret <2 x float> %1
+}
+
+define <2 x float> @test_pow_v2f32(<2 x float> %v1, <2 x float> %v2) {
+; CHECK-LABEL: test_pow_v2f32:
+; CHECK: bl pow
+; CHECK: bl pow
+ %1 = call <2 x float> @llvm.pow.v2f32(<2 x float> %v1, <2 x float> %v2)
+ ret <2 x float> %1
+}
+
+declare <2 x float> @llvm.cos.v2f32(<2 x float>)
+declare <2 x float> @llvm.sin.v2f32(<2 x float>)
+declare <2 x float> @llvm.pow.v2f32(<2 x float>, <2 x float>)
+
+define <4 x float> @test_cos_v4f32(<4 x float> %v1) {
+; CHECK-LABEL: test_cos_v4f32:
+; CHECK: bl cos
+; CHECK: bl cos
+; CHECK: bl cos
+; CHECK: bl cos
+ %1 = call <4 x float> @llvm.cos.v4f32(<4 x float> %v1)
+ ret <4 x float> %1
+}
+
+define <4 x float> @test_sin_v4f32(<4 x float> %v1) {
+; CHECK-LABEL: test_sin_v4f32:
+; CHECK: bl sin
+; CHECK: bl sin
+; CHECK: bl sin
+; CHECK: bl sin
+ %1 = call <4 x float> @llvm.sin.v4f32(<4 x float> %v1)
+ ret <4 x float> %1
+}
+
+define <4 x float> @test_pow_v4f32(<4 x float> %v1, <4 x float> %v2) {
+; CHECK-LABEL: test_pow_v4f32:
+; CHECK: bl pow
+; CHECK: bl pow
+; CHECK: bl pow
+; CHECK: bl pow
+ %1 = call <4 x float> @llvm.pow.v4f32(<4 x float> %v1, <4 x float> %v2)
+ ret <4 x float> %1
+}
+
+declare <4 x float> @llvm.cos.v4f32(<4 x float>)
+declare <4 x float> @llvm.sin.v4f32(<4 x float>)
+declare <4 x float> @llvm.pow.v4f32(<4 x float>, <4 x float>)
+
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