[llvm] r201479 - Fix broken CHECK lines
Nico Rieck
nico.rieck at gmail.com
Sat Feb 15 23:31:06 PST 2014
Author: nrieck
Date: Sun Feb 16 01:31:05 2014
New Revision: 201479
URL: http://llvm.org/viewvc/llvm-project?rev=201479&view=rev
Log:
Fix broken CHECK lines
Modified:
llvm/trunk/test/Analysis/CostModel/ARM/cast.ll
llvm/trunk/test/CodeGen/AArch64/fcvt-int.ll
llvm/trunk/test/CodeGen/ARM/2011-10-26-memset-inline.ll
llvm/trunk/test/CodeGen/ARM/build-attributes.ll
llvm/trunk/test/CodeGen/ARM/constantfp.ll
llvm/trunk/test/CodeGen/ARM/debug-frame-large-stack.ll
llvm/trunk/test/CodeGen/Hexagon/packetize_cond_inst.ll
llvm/trunk/test/CodeGen/X86/2011-05-09-loaduse.ll
llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll
llvm/trunk/test/CodeGen/X86/vector-gep.ll
llvm/trunk/test/MC/ELF/local-reloc.s
llvm/trunk/test/Transforms/DeadArgElim/deadexternal.ll
Modified: llvm/trunk/test/Analysis/CostModel/ARM/cast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Analysis/CostModel/ARM/cast.ll?rev=201479&r1=201478&r2=201479&view=diff
==============================================================================
--- llvm/trunk/test/Analysis/CostModel/ARM/cast.ll (original)
+++ llvm/trunk/test/Analysis/CostModel/ARM/cast.ll Sun Feb 16 01:31:05 2014
@@ -528,7 +528,7 @@ define i32 @casts() {
%r242 = uitofp <16 x i8> undef to <16 x double>
; CHECK: cost of 64 {{.*}} sitofp
%r243 = sitofp <16 x i8> undef to <16 x double>
- ; C4ECK: cost of 64 {{.*}} uitofp
+ ; CHECK: cost of 64 {{.*}} uitofp
%r244 = uitofp <16 x i16> undef to <16 x double>
; CHECK: cost of 64 {{.*}} sitofp
%r245 = sitofp <16 x i16> undef to <16 x double>
Modified: llvm/trunk/test/CodeGen/AArch64/fcvt-int.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/fcvt-int.ll?rev=201479&r1=201478&r2=201479&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/fcvt-int.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/fcvt-int.ll Sun Feb 16 01:31:05 2014
@@ -69,7 +69,7 @@ define float @test_i32tofloat(i32 %in) {
; CHECK-DAG: scvtf [[SIG:s[0-9]+]], {{w[0-9]+}}
%res = fsub float %signed, %unsigned
-; CHECL: fsub {{s[0-9]+}}, [[SIG]], [[UNSIG]]
+; CHECK: fsub {{s[0-9]+}}, [[SIG]], [[UNSIG]]
ret float %res
; CHECK: ret
}
Modified: llvm/trunk/test/CodeGen/ARM/2011-10-26-memset-inline.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2011-10-26-memset-inline.ll?rev=201479&r1=201478&r2=201479&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2011-10-26-memset-inline.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/2011-10-26-memset-inline.ll Sun Feb 16 01:31:05 2014
@@ -6,10 +6,10 @@ target datalayout = "e-p:32:32:32-i1:8:3
target triple = "thumbv7-apple-ios5.0.0"
; CHECK-GENERIC: strb
-; CHECK-GENERIT-NEXT: strb
-; CHECK-GENERIT-NEXT: strb
-; CHECK-GENERIT-NEXT: strb
-; CHECK-GENERIT-NEXT: strb
+; CHECK-GENERIC-NEXT: strb
+; CHECK-GENERIC-NEXT: strb
+; CHECK-GENERIC-NEXT: strb
+; CHECK-GENERIC-NEXT: strb
; CHECK-UNALIGNED: strb
; CHECK-UNALIGNED: str
define void @foo(i8* nocapture %c) nounwind optsize {
Modified: llvm/trunk/test/CodeGen/ARM/build-attributes.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/build-attributes.ll?rev=201479&r1=201478&r2=201479&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/build-attributes.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/build-attributes.ll Sun Feb 16 01:31:05 2014
@@ -283,8 +283,8 @@
; CORTEX-A9-MP: .eabi_attribute 23, 3
; CORTEX-A9-MP: .eabi_attribute 24, 1
; CORTEX-A9-MP: .eabi_attribute 25, 1
-; CORTEX-A9-NOT: .eabi_attribute 27
-; CORTEX-A9-NOT: .eabi_attribute 28
+; CORTEX-A9-MP-NOT: .eabi_attribute 27
+; CORTEX-A9-MP-NOT: .eabi_attribute 28
; CORTEX-A9-MP: .eabi_attribute 36, 1
; CORTEX-A9-MP: .eabi_attribute 42, 1
; CORTEX-A9-MP: .eabi_attribute 68, 1
@@ -401,7 +401,7 @@
; CORTEX-M4-HARD: .eabi_attribute 36, 1
; CORTEX-M4-HARD-NOT: .eabi_attribute 42
; CORTEX-M4-HARD-NOT: .eabi_attribute 44
-; CORTEX-M4-HRAD-NOT: .eabi_attribute 68
+; CORTEX-M4-HARD-NOT: .eabi_attribute 68
; CORTEX-R5: .cpu cortex-r5
; CORTEX-R5: .eabi_attribute 6, 10
Modified: llvm/trunk/test/CodeGen/ARM/constantfp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/constantfp.ll?rev=201479&r1=201478&r2=201479&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/constantfp.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/constantfp.ll Sun Feb 16 01:31:05 2014
@@ -15,7 +15,7 @@ define arm_aapcs_vfpcc float @test_vmov_
; CHECK: vmov.i32 d0, #0
; CHECK-NONEON-LABEL: test_vmov_imm:
-; CHECK_NONEON: vldr s0, {{.?LCPI[0-9]+_[0-9]+}}
+; CHECK-NONEON: vldr s0, {{.?LCPI[0-9]+_[0-9]+}}
ret float 0.0
}
@@ -24,7 +24,7 @@ define arm_aapcs_vfpcc float @test_vmvn_
; CHECK: vmvn.i32 d0, #0xb0000000
; CHECK-NONEON-LABEL: test_vmvn_imm:
-; CHECK_NONEON: vldr s0, {{.?LCPI[0-9]+_[0-9]+}}
+; CHECK-NONEON: vldr s0, {{.?LCPI[0-9]+_[0-9]+}}
ret float 8589934080.0
}
@@ -33,7 +33,7 @@ define arm_aapcs_vfpcc double @test_vmov
; CHECK: vmov.f64 d0, #1.0
; CHECK-NONEON-LABEL: test_vmov_f64:
-; CHECK_NONEON: vmov.f64 d0, #1.0
+; CHECK-NONEON: vmov.f64 d0, #1.0
ret double 1.0
}
@@ -43,7 +43,7 @@ define arm_aapcs_vfpcc double @test_vmov
; CHECK: vmov.i32 d0, #0
; CHECK-NONEON-LABEL: test_vmov_double_imm:
-; CHECK_NONEON: vldr d0, {{.?LCPI[0-9]+_[0-9]+}}
+; CHECK-NONEON: vldr d0, {{.?LCPI[0-9]+_[0-9]+}}
ret double 0.0
}
@@ -52,7 +52,7 @@ define arm_aapcs_vfpcc double @test_vmvn
; CHECK: vmvn.i32 d0, #0xb0000000
; CHECK-NONEON-LABEL: test_vmvn_double_imm:
-; CHECK_NONEON: vldr d0, {{.?LCPI[0-9]+_[0-9]+}}
+; CHECK-NONEON: vldr d0, {{.?LCPI[0-9]+_[0-9]+}}
ret double 0x4fffffff4fffffff
}
@@ -63,6 +63,6 @@ define arm_aapcs_vfpcc double @test_notv
; CHECK: vldr d0, {{.?LCPI[0-9]+_[0-9]+}}
; CHECK-NONEON-LABEL: test_notvmvn_double_imm:
-; CHECK_NONEON: vldr d0, {{.?LCPI[0-9]+_[0-9]+}}
+; CHECK-NONEON: vldr d0, {{.?LCPI[0-9]+_[0-9]+}}
ret double 0x4fffffffffffffff
}
Modified: llvm/trunk/test/CodeGen/ARM/debug-frame-large-stack.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/debug-frame-large-stack.ll?rev=201479&r1=201478&r2=201479&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/debug-frame-large-stack.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/debug-frame-large-stack.ll Sun Feb 16 01:31:05 2014
@@ -28,10 +28,10 @@ define void @test1() {
; CHECK-ARM: sub sp, sp, #256
; CHECK-ARM: .cfi_endproc
-; CHECK-ARM-FP_ELIM-LABEL: test1:
-; CHECK-ARM-FP_ELIM: .cfi_startproc
-; CHECK-ARM-FP_ELIM: sub sp, sp, #256
-; CHECK-ARM-FP_ELIM: .cfi_endproc
+; CHECK-ARM-FP-ELIM-LABEL: test1:
+; CHECK-ARM-FP-ELIM: .cfi_startproc
+; CHECK-ARM-FP-ELIM: sub sp, sp, #256
+; CHECK-ARM-FP-ELIM: .cfi_endproc
define void @test2() {
%tmp = alloca [ 4168 x i8 ] , align 4
Modified: llvm/trunk/test/CodeGen/Hexagon/packetize_cond_inst.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Hexagon/packetize_cond_inst.ll?rev=201479&r1=201478&r2=201479&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Hexagon/packetize_cond_inst.ll (original)
+++ llvm/trunk/test/CodeGen/Hexagon/packetize_cond_inst.ll Sun Feb 16 01:31:05 2014
@@ -12,7 +12,7 @@ target triple = "hexagon-unknown--elf"
; }
; CHECK: cmp
; CHECK-NEXT: add
-; CHECH-NEXT: add
+; CHECK-NEXT: add
define i32 @ifcnv_add(i32, i32, i32) nounwind readnone {
%4 = icmp sgt i32 %2, %1
br i1 %4, label %5, label %7
Modified: llvm/trunk/test/CodeGen/X86/2011-05-09-loaduse.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-05-09-loaduse.ll?rev=201479&r1=201478&r2=201479&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-05-09-loaduse.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-05-09-loaduse.ll Sun Feb 16 01:31:05 2014
@@ -1,7 +1,7 @@
; RUN: llc < %s -march=x86 -mcpu=corei7 | FileCheck %s
;CHECK-LABEL: test:
-;CHECK-not: pshufd
+;CHECK-NOT: pshufd
;CHECK: ret
define float @test(<4 x float>* %A) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll?rev=201479&r1=201478&r2=201479&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/tbm-intrinsics-x86_64.ll Sun Feb 16 01:31:05 2014
@@ -34,7 +34,7 @@ declare i64 @llvm.x86.tbm.bextri.u64(i64
define i64 @test_x86_tbm_bextri_u64_m(i64* nocapture %a) nounwind readonly {
entry:
- ; CHECK-LABEl: test_x86_tbm_bextri_u64_m:
+ ; CHECK-LABEL: test_x86_tbm_bextri_u64_m:
; CHECK-NOT: mov
; CHECK: bextr $
%tmp1 = load i64* %a, align 8
Modified: llvm/trunk/test/CodeGen/X86/vector-gep.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-gep.ll?rev=201479&r1=201478&r2=201479&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-gep.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-gep.ll Sun Feb 16 01:31:05 2014
@@ -34,7 +34,7 @@ entry:
;CHECK-LABEL: AGEP2:
define i32 @AGEP2(<4 x i32*> %param, <4 x i32> %off) nounwind {
entry:
-;CHECK_LABEL: AGEP2
+;CHECK-LABEL: AGEP2
;CHECK: vpslld $2
;CHECK-NEXT: vpadd
%A2 = getelementptr <4 x i32*> %param, <4 x i32> %off
Modified: llvm/trunk/test/MC/ELF/local-reloc.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ELF/local-reloc.s?rev=201479&r1=201478&r2=201479&view=diff
==============================================================================
--- llvm/trunk/test/MC/ELF/local-reloc.s (original)
+++ llvm/trunk/test/MC/ELF/local-reloc.s Sun Feb 16 01:31:05 2014
@@ -6,7 +6,7 @@
movl foo, %r14d
foo:
-// CHECKT: Relocations [
+// CHECK: Relocations [
// CHECK: Section (2) .rela.text {
// CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_32S .text 0x{{[^ ]+}}
// CHECK-NEXT: }
Modified: llvm/trunk/test/Transforms/DeadArgElim/deadexternal.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/DeadArgElim/deadexternal.ll?rev=201479&r1=201478&r2=201479&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/DeadArgElim/deadexternal.ll (original)
+++ llvm/trunk/test/Transforms/DeadArgElim/deadexternal.ll Sun Feb 16 01:31:05 2014
@@ -32,7 +32,7 @@ entry:
%i = alloca i32, align 4
store volatile i32 10, i32* %i, align 4
; CHECK: %tmp = load volatile i32* %i, align 4
-; CHECK-next: call void @f(i32 undef)
+; CHECK-NEXT: call void @f(i32 undef)
%tmp = load volatile i32* %i, align 4
call void @f(i32 %tmp)
ret void
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