[llvm] r201433 - TargetLowering: n * r where n > 2 should be an illegal addressing mode

Tom Stellard thomas.stellard at amd.com
Fri Feb 14 13:10:34 PST 2014


Author: tstellar
Date: Fri Feb 14 15:10:34 2014
New Revision: 201433

URL: http://llvm.org/viewvc/llvm-project?rev=201433&view=rev
Log:
TargetLowering: n * r where n > 2 should be an illegal addressing mode

Added:
    llvm/trunk/test/CodeGen/R600/codegen-prepare-addrmode-sext.ll
Modified:
    llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp

Modified: llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp?rev=201433&r1=201432&r2=201433&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp (original)
+++ llvm/trunk/lib/CodeGen/TargetLoweringBase.cpp Fri Feb 14 15:10:34 2014
@@ -1420,6 +1420,8 @@ bool TargetLoweringBase::isLegalAddressi
       return false;
     // Allow 2*r as r+r.
     break;
+  default: // Don't allow n * r
+    return false;
   }
 
   return true;

Added: llvm/trunk/test/CodeGen/R600/codegen-prepare-addrmode-sext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/codegen-prepare-addrmode-sext.ll?rev=201433&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/R600/codegen-prepare-addrmode-sext.ll (added)
+++ llvm/trunk/test/CodeGen/R600/codegen-prepare-addrmode-sext.ll Fri Feb 14 15:10:34 2014
@@ -0,0 +1,18 @@
+; RUN: opt -codegenprepare -S -o - %s | FileCheck %s
+
+target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
+target triple = "r600--"
+
+; XFAIL: *
+
+; CHECK-LABEL: @test
+; CHECK: mul
+; CHECK-NEXT: sext
+define void @test(i8 addrspace(1)* nocapture readonly %in, i32 %a, i8 %b) {
+entry:
+  %0 = mul nsw i32 %a, 3
+  %1 = sext i32 %0 to i64
+  %2 = getelementptr i8 addrspace(1)* %in, i64 %1
+  store i8 %b, i8 addrspace(1)* %2
+  ret void
+}





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