[PATCH] TargetLowering: n * r where n > 2 should be an illegal addressing mode
Tom Stellard
tom at stellard.net
Thu Feb 13 08:21:04 PST 2014
From: Tom Stellard <thomas.stellard at amd.com>
---
lib/CodeGen/TargetLoweringBase.cpp | 2 ++
test/CodeGen/R600/codegen-prepare-addrmode-sext.ll | 18 ++++++++++++++++++
2 files changed, 20 insertions(+)
create mode 100644 test/CodeGen/R600/codegen-prepare-addrmode-sext.ll
diff --git a/lib/CodeGen/TargetLoweringBase.cpp b/lib/CodeGen/TargetLoweringBase.cpp
index beaa9b9..00b551b 100644
--- a/lib/CodeGen/TargetLoweringBase.cpp
+++ b/lib/CodeGen/TargetLoweringBase.cpp
@@ -1420,6 +1420,8 @@ bool TargetLoweringBase::isLegalAddressingMode(const AddrMode &AM,
return false;
// Allow 2*r as r+r.
break;
+ default: // Don't allow n * r
+ return false;
}
return true;
diff --git a/test/CodeGen/R600/codegen-prepare-addrmode-sext.ll b/test/CodeGen/R600/codegen-prepare-addrmode-sext.ll
new file mode 100644
index 0000000..226f8e5
--- /dev/null
+++ b/test/CodeGen/R600/codegen-prepare-addrmode-sext.ll
@@ -0,0 +1,18 @@
+; RUN: opt -codegenprepare -S -o - %s | FileCheck %s
+
+target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
+target triple = "r600--"
+
+; XFAIL: *
+
+; CHECK-LABEL: @test
+; CHECK: mul
+; CHECK-NEXT: sext
+define void @test(i8 addrspace(1)* nocapture readonly %in, i32 %a, i8 %b) {
+entry:
+ %0 = mul nsw i32 %a, 3
+ %1 = sext i32 %0 to i64
+ %2 = getelementptr i8 addrspace(1)* %in, i64 %1
+ store i8 %b, i8 addrspace(1)* %2
+ ret void
+}
--
1.8.1.5
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