[llvm] r201333 - Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
Daniel Sanders
daniel.sanders at imgtec.com
Thu Feb 13 06:44:27 PST 2014
Author: dsanders
Date: Thu Feb 13 08:44:26 2014
New Revision: 201333
URL: http://llvm.org/viewvc/llvm-project?rev=201333&view=rev
Log:
Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call
Summary:
AsmPrinter::EmitInlineAsm() will no longer use the EmitRawText() call for
targets with mature MC support. Such targets will always parse the inline
assembly (even when emitting assembly). Targets without mature MC support
continue to use EmitRawText() for assembly output.
The hasRawTextSupport() check in AsmPrinter::EmitInlineAsm() has been replaced
with MCAsmInfo::UseIntegratedAs which when true, causes the integrated assembler
to parse inline assembly (even when emitting assembly output). UseIntegratedAs
is set to true for targets that consider any failure to parse valid assembly
to be a bug. Target specific subclasses generally enable the integrated
assembler in their constructor. The default value can be overridden with
-no-integrated-as.
All tests that rely on inline assembly supporting invalid assembly (for example,
those that use mnemonics such as 'foo' or 'hello world') have been updated to
disable the integrated assembler.
Changes since review (and last commit attempt):
- Fixed test failures that were missed due to configuration of local build.
(fixes crash.ll and a couple others).
- Fixed tests that happened to pass because the local build was on X86
(should fix 2007-12-17-InvokeAsm.ll)
- mature-mc-support.ll's should no longer require all targets to be compiled.
(should fix ARM and PPC buildbots)
- Object output (-filetype=obj and similar) now forces the integrated assembler
to be enabled regardless of default setting or -no-integrated-as.
(should fix SystemZ buildbots)
Reviewers: rafael
Reviewed By: rafael
CC: llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D2686
Added:
llvm/trunk/test/CodeGen/AArch64/mature-mc-support.ll
llvm/trunk/test/CodeGen/ARM/mature-mc-support.ll
llvm/trunk/test/CodeGen/Mips/mature-mc-support.ll
llvm/trunk/test/CodeGen/PowerPC/mature-mc-support.ll
llvm/trunk/test/CodeGen/SPARC/mature-mc-support.ll
llvm/trunk/test/CodeGen/SystemZ/mature-mc-support.ll
llvm/trunk/test/CodeGen/Thumb/mature-mc-support.ll
llvm/trunk/test/CodeGen/X86/mature-mc-support.ll
Modified:
llvm/trunk/include/llvm/MC/MCAsmInfo.h
llvm/trunk/include/llvm/MC/MCObjectStreamer.h
llvm/trunk/include/llvm/MC/MCStreamer.h
llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
llvm/trunk/lib/MC/MCAsmInfo.cpp
llvm/trunk/lib/MC/MCAsmInfoCOFF.cpp
llvm/trunk/lib/MC/MCAsmInfoDarwin.cpp
llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
llvm/trunk/test/CodeGen/AArch64/inline-asm-constraints.ll
llvm/trunk/test/CodeGen/AArch64/inline-asm-modifiers.ll
llvm/trunk/test/CodeGen/ARM/2009-04-06-AsmModifier.ll
llvm/trunk/test/CodeGen/ARM/arm-modifier.ll
llvm/trunk/test/CodeGen/ARM/crash-O0.ll
llvm/trunk/test/CodeGen/ARM/inlineasm-64bit.ll
llvm/trunk/test/CodeGen/ARM/inlineasm-imm-arm.ll
llvm/trunk/test/CodeGen/ARM/inlineasm3.ll
llvm/trunk/test/CodeGen/ARM/mult-alt-generic-arm.ll
llvm/trunk/test/CodeGen/ARM/subreg-remat.ll
llvm/trunk/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll
llvm/trunk/test/CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll
llvm/trunk/test/CodeGen/Generic/2007-04-27-LargeMemObject.ll
llvm/trunk/test/CodeGen/Generic/2007-12-17-InvokeAsm.ll
llvm/trunk/test/CodeGen/Generic/2008-02-20-MatchingMem.ll
llvm/trunk/test/CodeGen/Generic/asm-large-immediate.ll
llvm/trunk/test/CodeGen/Generic/inline-asm-mem-clobber.ll
llvm/trunk/test/CodeGen/Generic/inline-asm-special-strings.ll
llvm/trunk/test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll
llvm/trunk/test/CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll
llvm/trunk/test/CodeGen/Thumb/inlineasm-imm-thumb.ll
llvm/trunk/test/CodeGen/X86/2006-07-20-InlineAsm.ll
llvm/trunk/test/CodeGen/X86/2006-07-31-SingleRegClass.ll
llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll
llvm/trunk/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll
llvm/trunk/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll
llvm/trunk/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll
llvm/trunk/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll
llvm/trunk/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll
llvm/trunk/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll
llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
llvm/trunk/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll
llvm/trunk/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll
llvm/trunk/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll
llvm/trunk/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll
llvm/trunk/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll
llvm/trunk/test/CodeGen/X86/2009-09-19-earlyclobber.ll
llvm/trunk/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll
llvm/trunk/test/CodeGen/X86/2010-05-05-LocalAllocEarlyClobber.ll
llvm/trunk/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll
llvm/trunk/test/CodeGen/X86/2010-06-25-asm-RA-crash.ll
llvm/trunk/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll
llvm/trunk/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll
llvm/trunk/test/CodeGen/X86/2010-07-02-asm-alignstack.ll
llvm/trunk/test/CodeGen/X86/2010-07-06-asm-RIP.ll
llvm/trunk/test/CodeGen/X86/2010-07-13-indirectXconstraint.ll
llvm/trunk/test/CodeGen/X86/2011-10-11-SpillDead.ll
llvm/trunk/test/CodeGen/X86/asm-block-labels.ll
llvm/trunk/test/CodeGen/X86/asm-global-imm.ll
llvm/trunk/test/CodeGen/X86/cas.ll
llvm/trunk/test/CodeGen/X86/crash.ll
llvm/trunk/test/CodeGen/X86/fast-isel.ll
llvm/trunk/test/CodeGen/X86/fold-xmm-zero.ll
llvm/trunk/test/CodeGen/X86/inline-asm-flag-clobber.ll
llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll
llvm/trunk/test/CodeGen/X86/inline-asm-h.ll
llvm/trunk/test/CodeGen/X86/inline-asm-modifier-n.ll
llvm/trunk/test/CodeGen/X86/inline-asm-mrv.ll
llvm/trunk/test/CodeGen/X86/inline-asm-q-regs.ll
llvm/trunk/test/CodeGen/X86/inline-asm-stack-realign3.ll
llvm/trunk/test/CodeGen/X86/inline-asm-tied.ll
llvm/trunk/test/CodeGen/X86/inline-asm-x-scalar.ll
llvm/trunk/test/CodeGen/X86/inline-asm.ll
llvm/trunk/test/CodeGen/X86/ms-inline-asm.ll
llvm/trunk/test/CodeGen/X86/mult-alt-generic-i686.ll
llvm/trunk/test/CodeGen/X86/mult-alt-generic-x86_64.ll
llvm/trunk/test/CodeGen/X86/mult-alt-x86.ll
llvm/trunk/test/CodeGen/X86/multiple-loop-post-inc.ll
llvm/trunk/test/CodeGen/X86/opaque-constant-asm.ll
llvm/trunk/test/Transforms/BranchFolding/2007-10-19-InlineAsmDirectives.ll
Modified: llvm/trunk/include/llvm/MC/MCAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCAsmInfo.h?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCAsmInfo.h (original)
+++ llvm/trunk/include/llvm/MC/MCAsmInfo.h Thu Feb 13 08:44:26 2014
@@ -299,6 +299,14 @@ namespace llvm {
std::vector<MCCFIInstruction> InitialFrameState;
+ //===--- Integrated Assembler State ----------------------------------===//
+ /// Should we use the integrated assembler?
+ /// The integrated assembler should be enabled by default (by the
+ /// constructors) when failing to parse a valid piece of assembly (inline
+ /// or otherwise) is considered a bug. It may then be overridden after
+ /// construction (see LLVMTargetMachine::initAsmInfo()).
+ bool UseIntegratedAssembler;
+
public:
explicit MCAsmInfo();
virtual ~MCAsmInfo();
@@ -526,6 +534,14 @@ namespace llvm {
const std::vector<MCCFIInstruction> &getInitialFrameState() const {
return InitialFrameState;
}
+
+ /// Return true if assembly (inline or otherwise) should be parsed.
+ bool useIntegratedAssembler() const { return UseIntegratedAssembler; }
+
+ /// Set whether assembly (inline or otherwise) should be parsed.
+ void setUseIntegratedAssembler(bool Value) {
+ UseIntegratedAssembler = Value;
+ }
};
}
Modified: llvm/trunk/include/llvm/MC/MCObjectStreamer.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCObjectStreamer.h?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCObjectStreamer.h (original)
+++ llvm/trunk/include/llvm/MC/MCObjectStreamer.h Thu Feb 13 08:44:26 2014
@@ -51,6 +51,9 @@ public:
/// state management
virtual void reset();
+ /// Object streamers require the integrated assembler.
+ virtual bool isIntegratedAssemblerRequired() const { return true; }
+
protected:
MCSectionData *getCurrentSectionData() const {
return CurSectionData;
Modified: llvm/trunk/include/llvm/MC/MCStreamer.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCStreamer.h?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCStreamer.h (original)
+++ llvm/trunk/include/llvm/MC/MCStreamer.h Thu Feb 13 08:44:26 2014
@@ -75,6 +75,8 @@ public:
MCTargetStreamer(MCStreamer &S);
virtual ~MCTargetStreamer();
+ const MCStreamer &getStreamer() { return Streamer; }
+
// Allow a target to add behavior to the EmitLabel of MCStreamer.
virtual void emitLabel(MCSymbol *Symbol);
@@ -233,6 +235,10 @@ public:
/// unformatted text to the .s file with EmitRawText.
virtual bool hasRawTextSupport() const { return false; }
+ /// Is the integrated assembler required for this streamer to function
+ /// correctly?
+ virtual bool isIntegratedAssemblerRequired() const { return false; }
+
/// AddComment - Add a comment that can be emitted to the generated .s
/// file if applicable as a QoI issue to make the output of the compiler
/// more readable. This only affects the MCAsmStreamer, and only when
Modified: llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp (original)
+++ llvm/trunk/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp Thu Feb 13 08:44:26 2014
@@ -79,10 +79,15 @@ void AsmPrinter::EmitInlineAsm(StringRef
if (isNullTerminated)
Str = Str.substr(0, Str.size()-1);
- // If the output streamer is actually a .s file, just emit the blob textually.
+ // If the output streamer does not have mature MC support or the integrated
+ // assembler has been disabled, just emit the blob textually.
+ // Otherwise parse the asm and emit it via MC support.
// This is useful in case the asm parser doesn't handle something but the
// system assembler does.
- if (OutStreamer.hasRawTextSupport()) {
+ const MCAsmInfo *MCAI = TM.getMCAsmInfo();
+ assert(MCAI && "No MCAsmInfo");
+ if (!MCAI->useIntegratedAssembler() &&
+ !OutStreamer.isIntegratedAssemblerRequired()) {
OutStreamer.EmitRawText(Str);
emitInlineAsmEnd(TM.getSubtarget<MCSubtargetInfo>(), 0);
return;
Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original)
+++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Thu Feb 13 08:44:26 2014
@@ -53,6 +53,10 @@ static cl::opt<cl::boolOrDefault>
AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
cl::init(cl::BOU_UNSET));
+static cl::opt<bool>
+NoIntegratedAssembler("no-integrated-as", cl::Hidden,
+ cl::desc("Disable integrated assembler"));
+
static bool getVerboseAsm() {
switch (AsmVerbose) {
case cl::BOU_UNSET: return TargetMachine::getAsmVerbosityDefault();
@@ -63,14 +67,20 @@ static bool getVerboseAsm() {
}
void LLVMTargetMachine::initAsmInfo() {
- AsmInfo = TheTarget.createMCAsmInfo(*getRegisterInfo(), TargetTriple);
+ MCAsmInfo *TmpAsmInfo = TheTarget.createMCAsmInfo(*getRegisterInfo(),
+ TargetTriple);
// TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0,
// and if the old one gets included then MCAsmInfo will be NULL and
// we'll crash later.
// Provide the user with a useful error message about what's wrong.
- assert(AsmInfo && "MCAsmInfo not initialized. "
+ assert(TmpAsmInfo && "MCAsmInfo not initialized. "
"Make sure you include the correct TargetSelect.h"
"and that InitializeAllTargetMCs() is being invoked!");
+
+ if (NoIntegratedAssembler)
+ TmpAsmInfo->setUseIntegratedAssembler(false);
+
+ AsmInfo = TmpAsmInfo;
}
LLVMTargetMachine::LLVMTargetMachine(const Target &T, StringRef Triple,
Modified: llvm/trunk/lib/MC/MCAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAsmInfo.cpp?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCAsmInfo.cpp (original)
+++ llvm/trunk/lib/MC/MCAsmInfo.cpp Thu Feb 13 08:44:26 2014
@@ -86,6 +86,20 @@ MCAsmInfo::MCAsmInfo() {
DwarfRegNumForCFI = false;
NeedsDwarfSectionOffsetDirective = false;
UseParensForSymbolVariant = false;
+
+ // FIXME: Clang's logic should be synced with the logic used to initialize
+ // this member and the two implementations should be merged.
+ // For reference:
+ // - Solaris always enables the integrated assembler by default
+ // - SparcELFMCAsmInfo and X86ELFMCAsmInfo are handling this case
+ // - Windows always enables the integrated assembler by default
+ // - MCAsmInfoCOFF is handling this case, should it be MCAsmInfoMicrosoft?
+ // - MachO targets always enables the integrated assembler by default
+ // - MCAsmInfoDarwin is handling this case
+ // - Generic_GCC toolchains enable the integrated assembler on a per
+ // architecture basis.
+ // - The target subclasses for AArch64, ARM, and X86 handle these cases
+ UseIntegratedAssembler = false;
}
MCAsmInfo::~MCAsmInfo() {
Modified: llvm/trunk/lib/MC/MCAsmInfoCOFF.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAsmInfoCOFF.cpp?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCAsmInfoCOFF.cpp (original)
+++ llvm/trunk/lib/MC/MCAsmInfoCOFF.cpp Thu Feb 13 08:44:26 2014
@@ -35,6 +35,8 @@ MCAsmInfoCOFF::MCAsmInfoCOFF() {
HasLEB128 = true; // Target asm supports leb128 directives (little-endian)
SupportsDebugInformation = true;
NeedsDwarfSectionOffsetDirective = true;
+
+ UseIntegratedAssembler = true;
}
void MCAsmInfoMicrosoft::anchor() { }
Modified: llvm/trunk/lib/MC/MCAsmInfoDarwin.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAsmInfoDarwin.cpp?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCAsmInfoDarwin.cpp (original)
+++ llvm/trunk/lib/MC/MCAsmInfoDarwin.cpp Thu Feb 13 08:44:26 2014
@@ -57,4 +57,6 @@ MCAsmInfoDarwin::MCAsmInfoDarwin() {
HasNoDeadStrip = true;
DwarfUsesRelocationsAcrossSections = false;
+
+ UseIntegratedAssembler = true;
}
Modified: llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp Thu Feb 13 08:44:26 2014
@@ -35,6 +35,8 @@ AArch64ELFMCAsmInfo::AArch64ELFMCAsmInfo
// Exceptions handling
ExceptionsType = ExceptionHandling::DwarfCFI;
+
+ UseIntegratedAssembler = true;
}
// Pin the vtable to this file.
Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp Thu Feb 13 08:44:26 2014
@@ -29,6 +29,8 @@ ARMMCAsmInfoDarwin::ARMMCAsmInfoDarwin()
// Exceptions handling
ExceptionsType = ExceptionHandling::SjLj;
+
+ UseIntegratedAssembler = true;
}
void ARMELFMCAsmInfo::anchor() { }
@@ -50,4 +52,6 @@ ARMELFMCAsmInfo::ARMELFMCAsmInfo() {
// foo(plt) instead of foo at plt
UseParensForSymbolVariant = true;
+
+ UseIntegratedAssembler = true;
}
Modified: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp Thu Feb 13 08:44:26 2014
@@ -38,11 +38,13 @@ PPCMCAsmInfoDarwin::PPCMCAsmInfoDarwin(b
// rather than OS version
if (T.isMacOSX() && T.isMacOSXVersionLT(10, 6))
HasWeakDefCanBeHiddenDirective = false;
+
+ UseIntegratedAssembler = true;
}
void PPCLinuxMCAsmInfo::anchor() { }
-PPCLinuxMCAsmInfo::PPCLinuxMCAsmInfo(bool is64Bit) {
+PPCLinuxMCAsmInfo::PPCLinuxMCAsmInfo(bool is64Bit, const Triple& T) {
if (is64Bit) {
PointerSize = CalleeSaveStackSlotSize = 8;
}
@@ -71,5 +73,9 @@ PPCLinuxMCAsmInfo::PPCLinuxMCAsmInfo(boo
ZeroDirective = "\t.space\t";
Data64bitsDirective = is64Bit ? "\t.quad\t" : 0;
AssemblerDialect = 1; // New-Style mnemonics.
+
+ if (T.getOS() == llvm::Triple::FreeBSD ||
+ (T.getOS() == llvm::Triple::NetBSD && !is64Bit))
+ UseIntegratedAssembler = true;
}
Modified: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h (original)
+++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h Thu Feb 13 08:44:26 2014
@@ -29,7 +29,7 @@ class Triple;
class PPCLinuxMCAsmInfo : public MCAsmInfoELF {
virtual void anchor();
public:
- explicit PPCLinuxMCAsmInfo(bool is64Bit);
+ explicit PPCLinuxMCAsmInfo(bool is64Bit, const Triple&);
};
} // namespace llvm
Modified: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp Thu Feb 13 08:44:26 2014
@@ -75,7 +75,7 @@ static MCAsmInfo *createPPCMCAsmInfo(con
if (TheTriple.isOSDarwin())
MAI = new PPCMCAsmInfoDarwin(isPPC64, TheTriple);
else
- MAI = new PPCLinuxMCAsmInfo(isPPC64);
+ MAI = new PPCLinuxMCAsmInfo(isPPC64, TheTriple);
// Initial state of the frame pointer is R1.
unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1;
Modified: llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp Thu Feb 13 08:44:26 2014
@@ -42,6 +42,9 @@ SparcELFMCAsmInfo::SparcELFMCAsmInfo(Str
SunStyleELFSectionSwitchSyntax = true;
UsesELFSectionDirectiveForBSS = true;
+
+ if (TheTriple.getOS() == llvm::Triple::Solaris)
+ UseIntegratedAssembler = true;
}
const MCExpr*
Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp Thu Feb 13 08:44:26 2014
@@ -76,6 +76,8 @@ X86MCAsmInfoDarwin::X86MCAsmInfoDarwin(c
// version in use. From at least >= ld64-97.17 (Xcode 3.2.6) the abs-ified
// FDE relocs may be used.
DwarfFDESymbolsUseAbsDiff = T.isMacOSX() && !T.isMacOSXVersionLT(10, 6);
+
+ UseIntegratedAssembler = true;
}
X86_64MCAsmInfoDarwin::X86_64MCAsmInfoDarwin(const Triple &Triple)
@@ -114,6 +116,10 @@ X86ELFMCAsmInfo::X86ELFMCAsmInfo(const T
if ((T.getOS() == Triple::OpenBSD || T.getOS() == Triple::Bitrig) &&
T.getArch() == Triple::x86)
Data64bitsDirective = 0;
+
+ // Always enable the integrated assembler by default.
+ // Clang also enabled it when the OS is Solaris but that is redundant here.
+ UseIntegratedAssembler = true;
}
const MCExpr *
@@ -144,6 +150,8 @@ X86MCAsmInfoMicrosoft::X86MCAsmInfoMicro
TextAlignFillValue = 0x90;
AllowAtInName = true;
+
+ UseIntegratedAssembler = true;
}
void X86MCAsmInfoGNUCOFF::anchor() { }
@@ -158,4 +166,6 @@ X86MCAsmInfoGNUCOFF::X86MCAsmInfoGNUCOFF
// Exceptions handling
ExceptionsType = ExceptionHandling::DwarfCFI;
+
+ UseIntegratedAssembler = true;
}
Modified: llvm/trunk/test/CodeGen/AArch64/inline-asm-constraints.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/inline-asm-constraints.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/inline-asm-constraints.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/inline-asm-constraints.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-;RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon < %s | FileCheck %s
+;RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon -no-integrated-as < %s | FileCheck %s
define i64 @test_inline_constraint_r(i64 %base, i32 %offset) {
; CHECK-LABEL: test_inline_constraint_r:
Modified: llvm/trunk/test/CodeGen/AArch64/inline-asm-modifiers.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/inline-asm-modifiers.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/inline-asm-modifiers.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/inline-asm-modifiers.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=aarch64-none-linux-gnu -relocation-model=pic < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-none-linux-gnu -relocation-model=pic -no-integrated-as < %s | FileCheck %s
@var_simple = hidden global i32 0
@var_got = global i32 0
Added: llvm/trunk/test/CodeGen/AArch64/mature-mc-support.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/mature-mc-support.ll?rev=201333&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/mature-mc-support.ll (added)
+++ llvm/trunk/test/CodeGen/AArch64/mature-mc-support.ll Thu Feb 13 08:44:26 2014
@@ -0,0 +1,12 @@
+; Test that inline assembly is parsed by the MC layer when MC support is mature
+; (even when the output is assembly).
+
+; RUN: not llc -march=aarch64 < %s > /dev/null 2> %t1
+; RUN: FileCheck %s < %t1
+
+; RUN: not llc -march=aarch64 -filetype=obj < %s > /dev/null 2> %t2
+; RUN: FileCheck %s < %t2
+
+module asm " .this_directive_is_very_unlikely_to_exist"
+
+; CHECK: LLVM ERROR: Error parsing inline asm
Modified: llvm/trunk/test/CodeGen/ARM/2009-04-06-AsmModifier.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2009-04-06-AsmModifier.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2009-04-06-AsmModifier.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/2009-04-06-AsmModifier.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm | grep "swi 107"
+; RUN: llc < %s -march=arm -no-integrated-as | grep "swi 107"
define i32 @_swilseek(i32) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/ARM/arm-modifier.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/arm-modifier.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/arm-modifier.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/arm-modifier.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
+; RUN: llc < %s -march=arm -mattr=+vfp2 -no-integrated-as | FileCheck %s
define i32 @foo(float %scale, float %scale2) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/ARM/crash-O0.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/crash-O0.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/crash-O0.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/crash-O0.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -relocation-model=pic -disable-fp-elim
+; RUN: llc < %s -O0 -relocation-model=pic -disable-fp-elim -no-integrated-as
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64-n32"
target triple = "armv6-apple-darwin10"
Modified: llvm/trunk/test/CodeGen/ARM/inlineasm-64bit.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/inlineasm-64bit.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/inlineasm-64bit.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/inlineasm-64bit.ll Thu Feb 13 08:44:26 2014
@@ -1,5 +1,5 @@
-; RUN: llc < %s -O3 -mtriple=arm-linux-gnueabi | FileCheck %s
-; RUN: llc -mtriple=thumbv7-none-linux-gnueabi -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc < %s -O3 -mtriple=arm-linux-gnueabi -no-integrated-as | FileCheck %s
+; RUN: llc -mtriple=thumbv7-none-linux-gnueabi -verify-machineinstrs -no-integrated-as < %s | FileCheck %s
; check if regs are passing correctly
define void @i64_write(i64* %p, i64 %val) nounwind {
; CHECK-LABEL: i64_write:
Modified: llvm/trunk/test/CodeGen/ARM/inlineasm-imm-arm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/inlineasm-imm-arm.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/inlineasm-imm-arm.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/inlineasm-imm-arm.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm
+; RUN: llc < %s -march=arm -no-integrated-as
; Test ARM-mode "I" constraint, for any Data Processing immediate.
define i32 @testI(i32 %x) {
Modified: llvm/trunk/test/CodeGen/ARM/inlineasm3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/inlineasm3.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/inlineasm3.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/inlineasm3.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -float-abi=soft -mattr=+neon,+v6t2 | FileCheck %s
+; RUN: llc < %s -march=arm -float-abi=soft -mattr=+neon,+v6t2 -no-integrated-as | FileCheck %s
; Radar 7449043
%struct.int32x4_t = type { <4 x i32> }
Added: llvm/trunk/test/CodeGen/ARM/mature-mc-support.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/mature-mc-support.ll?rev=201333&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/mature-mc-support.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/mature-mc-support.ll Thu Feb 13 08:44:26 2014
@@ -0,0 +1,12 @@
+; Test that inline assembly is parsed by the MC layer when MC support is mature
+; (even when the output is assembly).
+
+; RUN: not llc -march=arm < %s > /dev/null 2> %t1
+; RUN: FileCheck %s < %t1
+
+; RUN: not llc -march=arm -filetype=obj < %s > /dev/null 2> %t2
+; RUN: FileCheck %s < %t2
+
+module asm " .this_directive_is_very_unlikely_to_exist"
+
+; CHECK: LLVM ERROR: Error parsing inline asm
Modified: llvm/trunk/test/CodeGen/ARM/mult-alt-generic-arm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/mult-alt-generic-arm.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/mult-alt-generic-arm.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/mult-alt-generic-arm.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm
+; RUN: llc < %s -march=arm -no-integrated-as
; ModuleID = 'mult-alt-generic.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
target triple = "arm"
Modified: llvm/trunk/test/CodeGen/ARM/subreg-remat.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/subreg-remat.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/subreg-remat.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/subreg-remat.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8 -pre-RA-sched=source | FileCheck %s
+; RUN: llc < %s -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8 -pre-RA-sched=source -no-integrated-as | FileCheck %s
target triple = "thumbv7-apple-ios"
; <rdar://problem/10032939>
;
Modified: llvm/trunk/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll (original)
+++ llvm/trunk/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -no-integrated-as < %s
; XFAIL: sparc-sun-solaris2
; PR1308
; PR1557
Modified: llvm/trunk/test/CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll (original)
+++ llvm/trunk/test/CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -no-integrated-as < %s
; Test that we can have an "X" output constraint.
Modified: llvm/trunk/test/CodeGen/Generic/2007-04-27-LargeMemObject.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/2007-04-27-LargeMemObject.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Generic/2007-04-27-LargeMemObject.ll (original)
+++ llvm/trunk/test/CodeGen/Generic/2007-04-27-LargeMemObject.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -no-integrated-as < %s
%struct..0anon = type { [100 x i32] }
Modified: llvm/trunk/test/CodeGen/Generic/2007-12-17-InvokeAsm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/2007-12-17-InvokeAsm.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Generic/2007-12-17-InvokeAsm.ll (original)
+++ llvm/trunk/test/CodeGen/Generic/2007-12-17-InvokeAsm.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -no-integrated-as < %s
define fastcc void @bc__support__high_resolution_time__initialize_clock_rate() {
entry:
Modified: llvm/trunk/test/CodeGen/Generic/2008-02-20-MatchingMem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/2008-02-20-MatchingMem.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Generic/2008-02-20-MatchingMem.ll (original)
+++ llvm/trunk/test/CodeGen/Generic/2008-02-20-MatchingMem.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -no-integrated-as < %s
; PR1133
; XFAIL: hexagon
define void @test(i32* %X) nounwind {
Modified: llvm/trunk/test/CodeGen/Generic/asm-large-immediate.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/asm-large-immediate.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Generic/asm-large-immediate.ll (original)
+++ llvm/trunk/test/CodeGen/Generic/asm-large-immediate.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -no-integrated-as < %s | FileCheck %s
define void @test() {
entry:
Modified: llvm/trunk/test/CodeGen/Generic/inline-asm-mem-clobber.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/inline-asm-mem-clobber.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Generic/inline-asm-mem-clobber.ll (original)
+++ llvm/trunk/test/CodeGen/Generic/inline-asm-mem-clobber.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc -O2 < %s | FileCheck %s
+; RUN: llc -O2 -no-integrated-as < %s | FileCheck %s
@G = common global i32 0, align 4
Modified: llvm/trunk/test/CodeGen/Generic/inline-asm-special-strings.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Generic/inline-asm-special-strings.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Generic/inline-asm-special-strings.ll (original)
+++ llvm/trunk/test/CodeGen/Generic/inline-asm-special-strings.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s | grep "foo 0 0"
+; RUN: llc -no-integrated-as < %s | grep "foo 0 0"
define void @bar() nounwind {
tail call void asm sideeffect "foo ${:uid} ${:uid}", ""() nounwind
Added: llvm/trunk/test/CodeGen/Mips/mature-mc-support.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/mature-mc-support.ll?rev=201333&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/mature-mc-support.ll (added)
+++ llvm/trunk/test/CodeGen/Mips/mature-mc-support.ll Thu Feb 13 08:44:26 2014
@@ -0,0 +1,32 @@
+; Test that inline assembly is parsed by the MC layer when MC support is mature
+; (even when the output is assembly).
+; FIXME: Mips doesn't use the integrated assembler by default so we only test
+; that -filetype=obj tries to parse the assembly.
+
+; SKIP: not llc -march=mips < %s > /dev/null 2> %t1
+; SKIP: FileCheck %s < %t1
+
+; RUN: not llc -march=mips -filetype=obj < %s > /dev/null 2> %t2
+; RUN: FileCheck %s < %t2
+
+; SKIP: not llc -march=mipsel < %s > /dev/null 2> %t3
+; SKIP: FileCheck %s < %t3
+
+; RUN: not llc -march=mipsel -filetype=obj < %s > /dev/null 2> %t4
+; RUN: FileCheck %s < %t4
+
+; SKIP: not llc -march=mips64 < %s > /dev/null 2> %t5
+; SKIP: FileCheck %s < %t5
+
+; RUN: not llc -march=mips64 -filetype=obj < %s > /dev/null 2> %t6
+; RUN: FileCheck %s < %t6
+
+; SKIP: not llc -march=mips64el < %s > /dev/null 2> %t7
+; SKIP: FileCheck %s < %t7
+
+; RUN: not llc -march=mips64el -filetype=obj < %s > /dev/null 2> %t8
+; RUN: FileCheck %s < %t8
+
+module asm " .this_directive_is_very_unlikely_to_exist"
+
+; CHECK: LLVM ERROR: Error parsing inline asm
Modified: llvm/trunk/test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll Thu Feb 13 08:44:26 2014
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 | grep "foo r3, r4"
-; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 | grep "bari r3, 47"
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 -no-integrated-as | grep "foo r3, r4"
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 -no-integrated-as | grep "bari r3, 47"
; PR1351
Modified: llvm/trunk/test/CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll (original)
+++ llvm/trunk/test/CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -no-integrated-as < %s
; PR1382
target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
Added: llvm/trunk/test/CodeGen/PowerPC/mature-mc-support.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/mature-mc-support.ll?rev=201333&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/mature-mc-support.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/mature-mc-support.ll Thu Feb 13 08:44:26 2014
@@ -0,0 +1,27 @@
+; Test that inline assembly is parsed by the MC layer when MC support is mature
+; (even when the output is assembly).
+; FIXME: PowerPC doesn't use the integrated assembler by default in all cases
+; so we only test that -filetype=obj tries to parse the assembly.
+; FIXME: PowerPC doesn't appear to support -filetype=obj for ppc64le
+
+; SKIP: not llc -march=ppc32 < %s > /dev/null 2> %t1
+; SKIP: FileCheck %s < %t1
+
+; RUN: not llc -march=ppc32 -filetype=obj < %s > /dev/null 2> %t2
+; RUN: FileCheck %s < %t2
+
+; SKIP: not llc -march=ppc64 < %s > /dev/null 2> %t3
+; SKIP: FileCheck %s < %t3
+
+; RUN: not llc -march=ppc64 -filetype=obj < %s > /dev/null 2> %t4
+; RUN: FileCheck %s < %t4
+
+; SKIP: not llc -march=ppc64le < %s > /dev/null 2> %t5
+; SKIP: FileCheck %s < %t5
+
+; SKIP: not llc -march=ppc64le -filetype=obj < %s > /dev/null 2> %t6
+; SKIP: FileCheck %s < %t6
+
+module asm " .this_directive_is_very_unlikely_to_exist"
+
+; CHECK: LLVM ERROR: Error parsing inline asm
Added: llvm/trunk/test/CodeGen/SPARC/mature-mc-support.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SPARC/mature-mc-support.ll?rev=201333&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/SPARC/mature-mc-support.ll (added)
+++ llvm/trunk/test/CodeGen/SPARC/mature-mc-support.ll Thu Feb 13 08:44:26 2014
@@ -0,0 +1,22 @@
+; Test that inline assembly is parsed by the MC layer when MC support is mature
+; (even when the output is assembly).
+; FIXME: SPARC doesn't use the integrated assembler by default in all cases
+; so we only test that -filetype=obj tries to parse the assembly.
+; FIXME: SPARC seems to accept directives that don't exist
+; XFAIL: *
+
+; SKIP: not llc -march=sparc < %s > /dev/null 2> %t1
+; SKIP: FileCheck %s < %t1
+
+; RUN: not llc -march=sparc -filetype=obj < %s > /dev/null 2> %t2
+; RUN: FileCheck %s < %t2
+
+; SKIP: not llc -march=sparcv9 < %s > /dev/null 2> %t3
+; SKIP: FileCheck %s < %t3
+
+; RUN: not llc -march=sparcv9 -filetype=obj < %s > /dev/null 2> %t4
+; RUN: FileCheck %s < %t4
+
+module asm " .this_directive_is_very_unlikely_to_exist"
+
+; CHECK: LLVM ERROR: Error parsing inline asm
Added: llvm/trunk/test/CodeGen/SystemZ/mature-mc-support.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SystemZ/mature-mc-support.ll?rev=201333&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/SystemZ/mature-mc-support.ll (added)
+++ llvm/trunk/test/CodeGen/SystemZ/mature-mc-support.ll Thu Feb 13 08:44:26 2014
@@ -0,0 +1,15 @@
+; Test that inline assembly is parsed by the MC layer when MC support is mature
+; (even when the output is assembly).
+; FIXME: SystemZ doesn't use the integrated assembler by default so we only test
+; that -filetype=obj tries to parse the assembly.
+
+; SKIP: not llc -march=systemz < %s > /dev/null 2> %t1
+; SKIP: FileCheck %s < %t1
+
+; RUN: not llc -march=systemz -filetype=obj < %s > /dev/null 2> %t2
+; RUN: FileCheck %s < %t2
+
+
+module asm " .this_directive_is_very_unlikely_to_exist"
+
+; CHECK: LLVM ERROR: Error parsing inline asm
Modified: llvm/trunk/test/CodeGen/Thumb/inlineasm-imm-thumb.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb/inlineasm-imm-thumb.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb/inlineasm-imm-thumb.ll (original)
+++ llvm/trunk/test/CodeGen/Thumb/inlineasm-imm-thumb.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=thumb
+; RUN: llc < %s -march=thumb -no-integrated-as
; Test Thumb-mode "I" constraint, for ADD immediate.
define i32 @testI(i32 %x) {
Added: llvm/trunk/test/CodeGen/Thumb/mature-mc-support.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Thumb/mature-mc-support.ll?rev=201333&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Thumb/mature-mc-support.ll (added)
+++ llvm/trunk/test/CodeGen/Thumb/mature-mc-support.ll Thu Feb 13 08:44:26 2014
@@ -0,0 +1,12 @@
+; Test that inline assembly is parsed by the MC layer when MC support is mature
+; (even when the output is assembly).
+
+; RUN: not llc -march=thumb < %s > /dev/null 2> %t1
+; RUN: FileCheck %s < %t1
+
+; RUN: not llc -march=thumb -filetype=obj < %s > /dev/null 2> %t2
+; RUN: FileCheck %s < %t2
+
+module asm " .this_directive_is_very_unlikely_to_exist"
+
+; CHECK: LLVM ERROR: Error parsing inline asm
Modified: llvm/trunk/test/CodeGen/X86/2006-07-20-InlineAsm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-07-20-InlineAsm.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-07-20-InlineAsm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-07-20-InlineAsm.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -march=x86 -no-integrated-as
; PR833
@G = weak global i32 0 ; <i32*> [#uses=3]
Modified: llvm/trunk/test/CodeGen/X86/2006-07-31-SingleRegClass.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2006-07-31-SingleRegClass.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2006-07-31-SingleRegClass.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2006-07-31-SingleRegClass.ll Thu Feb 13 08:44:26 2014
@@ -1,5 +1,5 @@
; PR850
-; RUN: llc < %s -march=x86 -x86-asm-syntax=att | FileCheck %s
+; RUN: llc < %s -march=x86 -x86-asm-syntax=att -no-integrated-as | FileCheck %s
; CHECK: {{movl 4[(]%eax[)],%ebp}}
; CHECK: {{movl 0[(]%eax[)], %ebx}}
Modified: llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep "mov %gs:72, %eax"
+; RUN: llc < %s -march=x86 -no-integrated-as | grep "mov %gs:72, %eax"
target datalayout = "e-p:32:32"
target triple = "i686-apple-darwin9"
Modified: llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=yonah -march=x86 | FileCheck %s
+; RUN: llc < %s -mcpu=yonah -march=x86 -no-integrated-as | FileCheck %s
target datalayout = "e-p:32:32"
target triple = "i686-apple-darwin9"
Modified: llvm/trunk/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -no-integrated-as < %s
; PR1748
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
+; RUN: llc -no-integrated-as < %s -mtriple=x86_64-unknown-linux-gnu
; PR1767
define void @xor_sse_2(i64 %bytes, i64* %p1, i64* %p2) {
Modified: llvm/trunk/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -relocation-model=static | FileCheck %s
+; RUN: llc < %s -relocation-model=static -no-integrated-as | FileCheck %s
; PR1761
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-pc-linux"
Modified: llvm/trunk/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -no-integrated-as < %s | FileCheck %s
; PR2078
; The clobber list says that "ax" is clobbered. Make sure that eax isn't
; allocated to the input/output register.
Modified: llvm/trunk/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -march=x86 -no-integrated-as
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i386-pc-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -no-integrated-as < %s | FileCheck %s
; rdar://5720231
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin8"
Modified: llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-09-18-inline-asm-2.ll Thu Feb 13 08:44:26 2014
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=x86 -regalloc=fast -optimize-regalloc=0 | FileCheck %s
-; RUN: llc < %s -march=x86 -regalloc=basic | FileCheck %s
-; RUN: llc < %s -march=x86 -regalloc=greedy | FileCheck %s
+; RUN: llc < %s -march=x86 -regalloc=fast -optimize-regalloc=0 -no-integrated-as | FileCheck %s
+; RUN: llc < %s -march=x86 -regalloc=basic -no-integrated-as | FileCheck %s
+; RUN: llc < %s -march=x86 -regalloc=greedy -no-integrated-as | FileCheck %s
; The 1st, 2nd, 3rd and 5th registers must all be different. The registers
; referenced in the 4th and 6th operands must not be the same as the 1st or 5th
Modified: llvm/trunk/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll Thu Feb 13 08:44:26 2014
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -march=x86 -no-integrated-as
+; RUN: llc < %s -march=x86-64 -no-integrated-as
define void @test(i64 %x) nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll Thu Feb 13 08:44:26 2014
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -march=x86 -no-integrated-as
+; RUN: llc < %s -march=x86-64 -no-integrated-as
; from gcc.c-torture/compile/920520-1.c
Modified: llvm/trunk/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | FileCheck %s
+; RUN: llc < %s -march=x86 -no-integrated-as | FileCheck %s
; ModuleID = 'shant.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
Modified: llvm/trunk/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin
+; RUN: llc < %s -mtriple=i386-apple-darwin -no-integrated-as
; rdar://6781755
; PR3934
Modified: llvm/trunk/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -relocation-model=static | FileCheck %s
+; RUN: llc < %s -relocation-model=static -no-integrated-as | FileCheck %s
; PR4152
; CHECK: {{1: ._pv_cpu_ops[+]8}}
Modified: llvm/trunk/test/CodeGen/X86/2009-09-19-earlyclobber.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-09-19-earlyclobber.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-09-19-earlyclobber.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-09-19-earlyclobber.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -no-integrated-as < %s | FileCheck %s
; ModuleID = '4964.c'
; PR 4964
; Registers other than RAX, RCX are OK, but they must be different.
Modified: llvm/trunk/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s
; pr5391
define void @t() nounwind ssp {
Modified: llvm/trunk/test/CodeGen/X86/2010-05-05-LocalAllocEarlyClobber.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-05-05-LocalAllocEarlyClobber.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-05-05-LocalAllocEarlyClobber.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-05-05-LocalAllocEarlyClobber.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -regalloc=fast | FileCheck %s
+; RUN: llc < %s -O0 -regalloc=fast -no-integrated-as | FileCheck %s
; PR6520
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
Modified: llvm/trunk/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc -regalloc=fast -optimize-regalloc=0 < %s | FileCheck %s
+; RUN: llc -regalloc=fast -optimize-regalloc=0 -no-integrated-as < %s | FileCheck %s
; PR7382
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu"
Modified: llvm/trunk/test/CodeGen/X86/2010-06-25-asm-RA-crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-06-25-asm-RA-crash.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-06-25-asm-RA-crash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-06-25-asm-RA-crash.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -disable-fp-elim -mtriple=i686-pc-mingw32
+; RUN: llc < %s -disable-fp-elim -mtriple=i686-pc-mingw32 -no-integrated-as
%struct.__SEH2Frame = type {}
Modified: llvm/trunk/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -O0 | FileCheck %s
+; RUN: llc < %s -march=x86 -O0 -no-integrated-as | FileCheck %s
; PR7509
target triple = "i386-apple-darwin10"
%asmtype = type { i32, i8*, i32, i32 }
Modified: llvm/trunk/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin11 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin11 -no-integrated-as | FileCheck %s
; Any register is OK for %0, but it must be a register, not memory.
define i32 @foo() nounwind ssp {
Modified: llvm/trunk/test/CodeGen/X86/2010-07-02-asm-alignstack.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-07-02-asm-alignstack.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-07-02-asm-alignstack.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-07-02-asm-alignstack.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -no-integrated-as | FileCheck %s
define void @foo() nounwind ssp {
entry:
Modified: llvm/trunk/test/CodeGen/X86/2010-07-06-asm-RIP.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-07-06-asm-RIP.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-07-06-asm-RIP.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-07-06-asm-RIP.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s
; PR 4752
@n = global i32 0 ; <i32*> [#uses=2]
Modified: llvm/trunk/test/CodeGen/X86/2010-07-13-indirectXconstraint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2010-07-13-indirectXconstraint.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2010-07-13-indirectXconstraint.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2010-07-13-indirectXconstraint.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s
; PR 7528
; formerly crashed
Modified: llvm/trunk/test/CodeGen/X86/2011-10-11-SpillDead.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2011-10-11-SpillDead.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/2011-10-11-SpillDead.ll (original)
+++ llvm/trunk/test/CodeGen/X86/2011-10-11-SpillDead.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-regalloc
+; RUN: llc < %s -verify-regalloc -no-integrated-as
; PR11125
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.7"
Modified: llvm/trunk/test/CodeGen/X86/asm-block-labels.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/asm-block-labels.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/asm-block-labels.ll (original)
+++ llvm/trunk/test/CodeGen/X86/asm-block-labels.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: opt < %s -std-compile-opts | llc
+; RUN: opt < %s -std-compile-opts | llc -no-integrated-as
; ModuleID = 'block12.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin8"
Modified: llvm/trunk/test/CodeGen/X86/asm-global-imm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/asm-global-imm.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/asm-global-imm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/asm-global-imm.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -relocation-model=static | FileCheck %s
+; RUN: llc < %s -march=x86 -relocation-model=static -no-integrated-as | FileCheck %s
; PR882
target datalayout = "e-p:32:32"
Modified: llvm/trunk/test/CodeGen/X86/cas.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cas.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cas.ll (original)
+++ llvm/trunk/test/CodeGen/X86/cas.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-linux-gnu %s -o - | FileCheck %s
+; RUN: llc -mtriple=x86_64-pc-linux-gnu %s -o - -no-integrated-as | FileCheck %s
; C code this came from
;bool cas(float volatile *p, float *expected, float desired) {
Modified: llvm/trunk/test/CodeGen/X86/crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/crash.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/crash.ll (original)
+++ llvm/trunk/test/CodeGen/X86/crash.ll Thu Feb 13 08:44:26 2014
@@ -1,7 +1,7 @@
; REQUIRES: asserts
-; RUN: llc -march=x86 < %s -verify-machineinstrs -precompute-phys-liveness
-; RUN: llc -march=x86-64 < %s -verify-machineinstrs -precompute-phys-liveness
-
+; RUN: llc -march=x86 -no-integrated-as < %s -verify-machineinstrs -precompute-phys-liveness
+; RUN: llc -march=x86-64 -no-integrated-as < %s -verify-machineinstrs -precompute-phys-liveness
+
; PR6497
; Chain and flag folding issues.
Modified: llvm/trunk/test/CodeGen/X86/fast-isel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel.ll Thu Feb 13 08:44:26 2014
@@ -1,5 +1,5 @@
-; RUN: llc < %s -fast-isel -fast-isel-abort -verify-machineinstrs -march=x86 -mattr=sse2
-; RUN: llc < %s -fast-isel -fast-isel-abort -verify-machineinstrs -mtriple=x86_64-apple-darwin10
+; RUN: llc < %s -fast-isel -fast-isel-abort -verify-machineinstrs -march=x86 -mattr=sse2 -no-integrated-as
+; RUN: llc < %s -fast-isel -fast-isel-abort -verify-machineinstrs -mtriple=x86_64-apple-darwin10 -no-integrated-as
; This tests very minimal fast-isel functionality.
Modified: llvm/trunk/test/CodeGen/X86/fold-xmm-zero.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fold-xmm-zero.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fold-xmm-zero.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fold-xmm-zero.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-macosx10.6.7 -mattr=+sse2 | FileCheck %s
+; RUN: llc < %s -mtriple=i386-apple-macosx10.6.7 -mattr=+sse2 -no-integrated-as | FileCheck %s
; Simple test to make sure folding for special constants (like float zero)
; isn't completely broken.
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-flag-clobber.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-flag-clobber.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-flag-clobber.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-flag-clobber.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 < %s | FileCheck %s
+; RUN: llc -march=x86-64 -no-integrated-as < %s | FileCheck %s
; PR3701
define i64 @t(i64* %arg) nounwind {
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-fpstack.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -mtriple=i386-apple-darwin | FileCheck %s
+; RUN: llc < %s -mcpu=generic -mtriple=i386-apple-darwin -no-integrated-as | FileCheck %s
; There should be no stack manipulations between the inline asm and ret.
; CHECK: test1
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-h.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-h.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-h.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-h.ll Thu Feb 13 08:44:26 2014
@@ -9,4 +9,4 @@ entry:
}
; CHECK: zed
-; CHECK: movq %mm2,foobar+8(%rip)
+; CHECK: movq %mm2, foobar+8(%rip)
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-modifier-n.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-modifier-n.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-modifier-n.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-modifier-n.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 | grep " 37"
+; RUN: llc < %s -march=x86 -no-integrated-as | grep " 37"
; rdar://7008959
define void @bork() nounwind {
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-mrv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-mrv.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-mrv.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-mrv.ll Thu Feb 13 08:44:26 2014
@@ -1,8 +1,8 @@
; PR2094
-; RUN: llc < %s -march=x86-64 | grep movslq
-; RUN: llc < %s -march=x86-64 | grep addps
-; RUN: llc < %s -march=x86-64 | grep paddd
-; RUN: llc < %s -march=x86-64 | not grep movq
+; RUN: llc < %s -march=x86-64 -no-integrated-as | grep movslq
+; RUN: llc < %s -march=x86-64 -no-integrated-as | grep addps
+; RUN: llc < %s -march=x86-64 -no-integrated-as | grep paddd
+; RUN: llc < %s -march=x86-64 -no-integrated-as | not grep movq
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin8"
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-q-regs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-q-regs.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-q-regs.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-q-regs.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+avx
+; RUN: llc < %s -march=x86-64 -mattr=+avx -no-integrated-as
; rdar://7066579
%0 = type { i64, i64, i64, i64, i64 } ; type %0
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-stack-realign3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-stack-realign3.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-stack-realign3.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-stack-realign3.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 < %s | FileCheck %s
+; RUN: llc -march=x86 -no-integrated-as < %s | FileCheck %s
declare void @bar(i32* %junk)
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-tied.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-tied.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-tied.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-tied.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 -optimize-regalloc -regalloc=basic | FileCheck %s
+; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 -optimize-regalloc -regalloc=basic -no-integrated-as | FileCheck %s
; rdar://6992609
; CHECK: movl [[EDX:%e..]], 4(%esp)
Modified: llvm/trunk/test/CodeGen/X86/inline-asm-x-scalar.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm-x-scalar.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm-x-scalar.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm-x-scalar.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=yonah
+; RUN: llc < %s -march=x86 -mcpu=yonah -no-integrated-as
define void @test1() {
tail call void asm sideeffect "ucomiss $0", "x"( float 0x41E0000000000000)
Modified: llvm/trunk/test/CodeGen/X86/inline-asm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/inline-asm.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/inline-asm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/inline-asm.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -march=x86 -no-integrated-as
define i32 @test1() nounwind {
; Dest is AX, dest type = i32.
Added: llvm/trunk/test/CodeGen/X86/mature-mc-support.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mature-mc-support.ll?rev=201333&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mature-mc-support.ll (added)
+++ llvm/trunk/test/CodeGen/X86/mature-mc-support.ll Thu Feb 13 08:44:26 2014
@@ -0,0 +1,18 @@
+; Test that inline assembly is parsed by the MC layer when MC support is mature
+; (even when the output is assembly).
+
+; RUN: not llc -march=x86 < %s > /dev/null 2> %t1
+; RUN: FileCheck %s < %t1
+
+; RUN: not llc -march=x86 -filetype=obj < %s > /dev/null 2> %t2
+; RUN: FileCheck %s < %t2
+
+; RUN: not llc -march=x86-64 < %s > /dev/null 2> %t3
+; RUN: FileCheck %s < %t3
+
+; RUN: not llc -march=x86-64 -filetype=obj < %s > /dev/null 2> %t4
+; RUN: FileCheck %s < %t4
+
+module asm " .this_directive_is_very_unlikely_to_exist"
+
+; CHECK: LLVM ERROR: Error parsing inline asm
Modified: llvm/trunk/test/CodeGen/X86/ms-inline-asm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ms-inline-asm.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ms-inline-asm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/ms-inline-asm.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=core2 | FileCheck %s
+; RUN: llc < %s -march=x86 -mcpu=core2 -no-integrated-as | FileCheck %s
define i32 @t1() nounwind {
entry:
Modified: llvm/trunk/test/CodeGen/X86/mult-alt-generic-i686.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mult-alt-generic-i686.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mult-alt-generic-i686.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mult-alt-generic-i686.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86
+; RUN: llc < %s -march=x86 -no-integrated-as
; ModuleID = 'mult-alt-generic.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
target triple = "i686"
Modified: llvm/trunk/test/CodeGen/X86/mult-alt-generic-x86_64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mult-alt-generic-x86_64.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mult-alt-generic-x86_64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mult-alt-generic-x86_64.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64
+; RUN: llc < %s -march=x86-64 -no-integrated-as
; ModuleID = 'mult-alt-generic.c'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64"
Modified: llvm/trunk/test/CodeGen/X86/mult-alt-x86.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/mult-alt-x86.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/mult-alt-x86.ll (original)
+++ llvm/trunk/test/CodeGen/X86/mult-alt-x86.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2
+; RUN: llc < %s -march=x86 -mattr=+sse2 -no-integrated-as
; ModuleID = 'mult-alt-x86.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
target triple = "i686-pc-win32"
Modified: llvm/trunk/test/CodeGen/X86/multiple-loop-post-inc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/multiple-loop-post-inc.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/multiple-loop-post-inc.ll (original)
+++ llvm/trunk/test/CodeGen/X86/multiple-loop-post-inc.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc -asm-verbose=false -disable-branch-fold -disable-block-placement -disable-tail-duplicate -march=x86-64 -mcpu=nehalem < %s | FileCheck %s
+; RUN: llc -asm-verbose=false -disable-branch-fold -disable-block-placement -disable-tail-duplicate -march=x86-64 -mcpu=nehalem -no-integrated-as < %s | FileCheck %s
; rdar://7236213
;
; The scheduler's 2-address hack has been disabled, so there is
Modified: llvm/trunk/test/CodeGen/X86/opaque-constant-asm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/opaque-constant-asm.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/opaque-constant-asm.ll (original)
+++ llvm/trunk/test/CodeGen/X86/opaque-constant-asm.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s
; This tests makes sure that we not mistake the bitcast inside the asm statement
; as an opaque constant. If we do, then the compilation will simply fail.
Modified: llvm/trunk/test/Transforms/BranchFolding/2007-10-19-InlineAsmDirectives.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/BranchFolding/2007-10-19-InlineAsmDirectives.ll?rev=201333&r1=201332&r2=201333&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/BranchFolding/2007-10-19-InlineAsmDirectives.ll (original)
+++ llvm/trunk/test/Transforms/BranchFolding/2007-10-19-InlineAsmDirectives.ll Thu Feb 13 08:44:26 2014
@@ -1,4 +1,4 @@
-; RUN: opt < %s -std-compile-opts -o - | llc -o - | grep bork_directive | wc -l | grep 2
+; RUN: opt < %s -std-compile-opts -o - | llc -no-integrated-as -o - | grep bork_directive | wc -l | grep 2
;; We don't want branch folding to fold asm directives.
More information about the llvm-commits
mailing list