[llvm] r201305 - Add Cortex-A53 and Cortex-A57 cores to the AArch64 backend

Oliver Stannard oliver.stannard at arm.com
Thu Feb 13 01:46:13 PST 2014


Author: olista01
Date: Thu Feb 13 03:46:11 2014
New Revision: 201305

URL: http://llvm.org/viewvc/llvm-project?rev=201305&view=rev
Log:
Add Cortex-A53 and Cortex-A57 cores to the AArch64 backend

Added:
    llvm/trunk/test/CodeGen/AArch64/cpus.ll
Modified:
    llvm/trunk/lib/Target/AArch64/AArch64.td

Modified: llvm/trunk/lib/Target/AArch64/AArch64.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64.td?rev=201305&r1=201304&r2=201305&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64.td Thu Feb 13 03:46:11 2014
@@ -36,8 +36,19 @@ def FeatureCrypto : SubtargetFeature<"cr
 
 include "AArch64Schedule.td"
 
+class ProcNoItin<string Name, list<SubtargetFeature> Features>
+ : Processor<Name, NoItineraries, Features>;
+
 def : Processor<"generic", GenericItineraries, [FeatureFPARMv8]>;
 
+def : ProcNoItin<"cortex-a53",      [FeatureFPARMv8,
+                                    FeatureNEON,
+                                    FeatureCrypto]>;
+
+def : ProcNoItin<"cortex-a57",      [FeatureFPARMv8,
+                                    FeatureNEON,
+                                    FeatureCrypto]>;
+
 //===----------------------------------------------------------------------===//
 // Register File Description
 //===----------------------------------------------------------------------===//

Added: llvm/trunk/test/CodeGen/AArch64/cpus.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/cpus.ll?rev=201305&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/cpus.ll (added)
+++ llvm/trunk/test/CodeGen/AArch64/cpus.ll Thu Feb 13 03:46:11 2014
@@ -0,0 +1,13 @@
+; This tests that llc accepts all valid AArch64 CPUs
+
+; RUN: llc < %s -march=aarch64 -mcpu=generic 2>&1 | FileCheck %s
+; RUN: llc < %s -march=aarch64 -mcpu=cortex-a53 2>&1 | FileCheck %s
+; RUN: llc < %s -march=aarch64 -mcpu=cortex-a57 2>&1 | FileCheck %s
+; RUN: llc < %s -march=aarch64 -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALID
+
+; CHECK-NOT: {{.*}}  is not a recognized processor for this target
+; INVALID: {{.*}}  is not a recognized processor for this target
+
+define i32 @f(i64 %z) {
+	ret i32 0
+}





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