[llvm] r201193 - Tweak ARM fastcc by adopting these two AAPCS rules:

[Eric Christopher]

> +
> +  // CPRCs may be allocated to co-processor registers or the stack â EURO " they
> +  // may never be allocated to core registers.

Special characters?

-eric

> +}
> +
> +define fastcc float @t3(double %d0, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, float %a, double %b, float %c) {
> +entry:
> +; CHECK-LABEL: t3:
> +; CHECK: vldr
> +  %add = fadd float %a, %c
> +  ret float %add
> +}
> +
> +define fastcc double @t4(double %a, double %b) #0 {
> +entry:
> +; CHECK-LABEL: t4:
> +; CHECK: vstr
> +  %add = fadd double %a, %b
> +  %sub = fsub double %a, %b
> +  %call = tail call fastcc double @x(double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double %add, float 0.000000e+00, double %sub) #2
> +  ret double %call
> +}
> +
> +declare fastcc double @x(double, double, double, double, double, double, double, float, double)
>
>
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