[PATCH] [AArch64]Fix the problems that can't select mul/add/sub of v1i8/v1i16/v1i32 types

[Ana Pazos]

Hi Hal,

Agreed, the vectorizer could cause this type of change. And it looks like the slp vectorizer is on by default for aarch64 and other targets.

I would like to know the test that triggered it, was it from Emperor test, LLVM test-suite or another benchmark suite?

Thanks,
Ana.

-----Original Message-----
From: Hal Finkel [mailto:hfinkel at anl.gov] 
Sent: Tuesday, February 11, 2014 10:37 AM
To: Ana Pazos
Cc: llvm-commits at cs.uiuc.edu; reviews+D2735+public+a199aafffbe6348c at llvm-reviews.chandlerc.com; Hao Liu; t p northover
Subject: Re: [PATCH] [AArch64]Fix the problems that can't select mul/add/sub of v1i8/v1i16/v1i32 types

----- Original Message -----
> From: "Ana Pazos" <apazos at codeaurora.org>
> To: reviews+D2735+public+a199aafffbe6348c at llvm-reviews.chandlerc.com, "Hao Liu" <Hao.Liu at arm.com>, "t p northover"
> <t.p.northover at gmail.com>
> Cc: llvm-commits at cs.uiuc.edu
> Sent: Tuesday, February 11, 2014 12:26:18 PM
> Subject: RE: [PATCH] [AArch64]Fix the problems that can't select	mul/add/sub	of v1i8/v1i16/v1i32 types
> 
> Hao,
> 
> Which C code is resulting in operations with v1ix types? Can you show 
> an example?
> 
> One can write LLVM IR code with these types, but not C code. And 
> currently there is no pass that rewrites the IR to use these types, 
> for example to move computation from integer unit to Neon.
> 
> Just trying to understand where the need for this patch comes from.

The vectorizers, especially the SLP vectorizer, certainly will produce these types. They come, as an example, when if conversion is performed.

 -Hal

> 
> Thanks,
> Ana.
> 
> -----Original Message-----
> From: llvm-commits-bounces at cs.uiuc.edu 
> [mailto:llvm-commits-bounces at cs.uiuc.edu] On Behalf Of Tim Northover
> Sent: Tuesday, February 11, 2014 2:50 AM
> To: t.p.northover at gmail.com; Hao.Liu at arm.com
> Cc: llvm-commits at cs.uiuc.edu
> Subject: Re: [PATCH] [AArch64]Fix the problems that can't select 
> mul/add/sub of v1i8/v1i16/v1i32 types
> 
> 
>   Hi Hao,
> 
>   This looks good, though I have to say I'm really starting to doubt
>   the
> wisdom of adding v1iN as valid types. We're adding so much 
> boiler-plate to cope with the extra operations. Oh well, a problem for 
> another day.
> 
>   Cheers.
> 
>   Tim.
> 
> http://llvm-reviews.chandlerc.com/D2735
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--
Hal Finkel
Assistant Computational Scientist
Leadership Computing Facility
Argonne National Laboratory