[PATCH] [AArch64] Add missing PCRel relocations for AArch64 in RuntimeDyldELF

[Bradley Smith]

Hi Tim,

Is this fixed up patch ok to go in without the tests being enabled?

Regards,
Bradley Smith

> -----Original Message-----
> From: Bradley Smith [mailto:bradley.smith at arm.com]
> Sent: 07 February 2014 11:42
> To: Bradley Smith; t.p.northover at gmail.com
> Cc: llvm-commits at cs.uiuc.edu; Amara Emerson
> Subject: Re: [PATCH] [AArch64] Add missing PCRel relocations for
> AArch64 in RuntimeDyldELF
> 
>   Add missing ULL suffix on constants applied to ~ operations on 64 bit
> types.
> 
> http://llvm-reviews.chandlerc.com/D2696
> 
> CHANGE SINCE LAST DIFF
>   http://llvm-reviews.chandlerc.com/D2696?vs=6879&id=6935#toc
> 
> Files:
>   lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
> 
> Index: lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
> ===================================================================
> --- lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
> +++ lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
> @@ -454,6 +454,48 @@
>      assert((*TargetPtr >> 21 & 0x3) == 0 && "invalid shift for
> relocation");
>      break;
>    }
> +  case ELF::R_AARCH64_ADR_PREL_PG_HI21: {
> +    // Operation: Page(S+A) - Page(P)
> +    uint64_t Result = ((Value + Addend) & ~0xfffULL) - (FinalAddress &
> ~0xfffULL);
> +
> +    // Check that -2^32 <= X < 2^32
> +    assert(static_cast<int64_t>(Result) >= (-1LL << 32) &&
> +           static_cast<int64_t>(Result) < (1LL << 32) &&
> +           "overflow check failed for relocation");
> +
> +    // AArch64 code is emitted with .rela relocations. The data
> already in any
> +    // bits affected by the relocation on entry is garbage.
> +    *TargetPtr &= 0x9f00001fU;
> +    // Immediate goes in bits 30:29 + 5:23 of ADRP instruction, taken
> +    // from bits 32:12 of X.
> +    *TargetPtr |= ((Result & 0x3000U) << (29 - 12));
> +    *TargetPtr |= ((Result & 0x1ffffc000ULL) >> (14 - 5));
> +    break;
> +  }
> +  case ELF::R_AARCH64_LDST32_ABS_LO12_NC: {
> +    // Operation: S + A
> +    uint64_t Result = Value + Addend;
> +
> +    // AArch64 code is emitted with .rela relocations. The data
> already in any
> +    // bits affected by the relocation on entry is garbage.
> +    *TargetPtr &= 0xffc003ffU;
> +    // Immediate goes in bits 21:10 of LD/ST instruction, taken
> +    // from bits 11:2 of X
> +    *TargetPtr |= ((Result & 0xffc) << (10 - 2));
> +    break;
> +  }
> +  case ELF::R_AARCH64_LDST64_ABS_LO12_NC: {
> +    // Operation: S + A
> +    uint64_t Result = Value + Addend;
> +
> +    // AArch64 code is emitted with .rela relocations. The data
> already in any
> +    // bits affected by the relocation on entry is garbage.
> +    *TargetPtr &= 0xffc003ffU;
> +    // Immediate goes in bits 21:10 of LD/ST instruction, taken
> +    // from bits 11:3 of X
> +    *TargetPtr |= ((Result & 0xff8) << (10 - 3));
> +    break;
> +  }
>    }
>  }