[llvm] r201029 - ARM: change attribute tests to use parsed form
Saleem Abdulrasool
compnerd at compnerd.org
Sat Feb 8 15:17:03 PST 2014
Author: compnerd
Date: Sat Feb 8 17:17:02 2014
New Revision: 201029
URL: http://llvm.org/viewvc/llvm-project?rev=201029&view=rev
Log:
ARM: change attribute tests to use parsed form
This makes the tests more readable by using the -arm-attributes decoding support
in llvm-readobj since that is now available. Change the invocation commands to
be similar to other test and use a more precise triple (the tests only require
ARM EABI support).
Modified:
llvm/trunk/test/MC/ARM/directive-arch-armv2.s
llvm/trunk/test/MC/ARM/directive-arch-armv2a.s
llvm/trunk/test/MC/ARM/directive-arch-armv3.s
llvm/trunk/test/MC/ARM/directive-arch-armv3m.s
llvm/trunk/test/MC/ARM/directive-arch-armv4.s
llvm/trunk/test/MC/ARM/directive-arch-armv4t.s
llvm/trunk/test/MC/ARM/directive-arch-armv5.s
llvm/trunk/test/MC/ARM/directive-arch-armv5t.s
llvm/trunk/test/MC/ARM/directive-arch-armv5te.s
llvm/trunk/test/MC/ARM/directive-arch-armv6-m.s
llvm/trunk/test/MC/ARM/directive-arch-armv6.s
llvm/trunk/test/MC/ARM/directive-arch-armv6j.s
llvm/trunk/test/MC/ARM/directive-arch-armv6t2.s
llvm/trunk/test/MC/ARM/directive-arch-armv6z.s
llvm/trunk/test/MC/ARM/directive-arch-armv6zk.s
llvm/trunk/test/MC/ARM/directive-arch-armv7-a.s
llvm/trunk/test/MC/ARM/directive-arch-armv7-m.s
llvm/trunk/test/MC/ARM/directive-arch-armv7-r.s
llvm/trunk/test/MC/ARM/directive-arch-armv7.s
llvm/trunk/test/MC/ARM/directive-arch-armv7a.s
llvm/trunk/test/MC/ARM/directive-arch-armv7m.s
llvm/trunk/test/MC/ARM/directive-arch-armv7r.s
llvm/trunk/test/MC/ARM/directive-arch-armv8-a.s
llvm/trunk/test/MC/ARM/directive-arch-armv8a.s
llvm/trunk/test/MC/ARM/directive-arch-iwmmxt.s
llvm/trunk/test/MC/ARM/directive-arch-iwmmxt2.s
llvm/trunk/test/MC/ARM/directive-eabi_attribute-overwrite.s
llvm/trunk/test/MC/ARM/directive-fpu-multiple.s
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv2.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv2.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv2.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv2.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,28 @@
@ This test case will check the default .ARM.attributes value for the
@ armv2 architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv2
@ CHECK-ASM: .arch armv2
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 23
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05320006 010801 |.2.....|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 2
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v4
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv2a.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv2a.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv2a.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv2a.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,28 @@
@ This test case will check the default .ARM.attributes value for the
@ armv2a architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv2a
@ CHECK-ASM: .arch armv2a
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 24
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 41170000 00616561 62690001 0D000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05324100 06010801 |.2A.....|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 2A
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v4
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv3.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv3.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv3.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv3.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,28 @@
@ This test case will check the default .ARM.attributes value for the
@ armv3 architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv3
@ CHECK-ASM: .arch armv3
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 23
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05330006 010801 |.3.....|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 3
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v4
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv3m.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv3m.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv3m.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv3m.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,28 @@
@ This test case will check the default .ARM.attributes value for the
@ armv3m architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv3m
@ CHECK-ASM: .arch armv3m
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 24
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 41170000 00616561 62690001 0D000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05334D00 06010801 |.3M.....|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 3M
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v4
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv4.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv4.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv4.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv4.s Sat Feb 8 17:17:02 2014
@@ -3,32 +3,30 @@
@ This test case will check the default .ARM.attributes value for the
@ armv4 architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv4
@ CHECK-ASM: .arch armv4
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x{{[0-9A-F]*}}
-@ CHECK-OBJ: Size: 23
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05340006 010801 |.4.....|
-@ CHECK-OBJ: )
-
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 4
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v4
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
@ Check that multiplication is supported
mul r4, r5, r6
@@ -37,3 +35,4 @@
umull r4, r5, r6, r3
smlal r4, r5, r6, r3
umlal r4, r5, r6, r3
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv4t.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv4t.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv4t.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv4t.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,32 @@
@ This test case will check the default .ARM.attributes value for the
@ armv4t architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv4t
@ CHECK-ASM: .arch armv4t
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 26
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05345400 06020801 0901 |.4T.......|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 4T
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v4T
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-1
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv5.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv5.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv5.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv5.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,28 @@
@ This test case will check the default .ARM.attributes value for the
@ armv5 architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv5
@ CHECK-ASM: .arch armv5
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 23
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05350006 030801 |.5.....|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 5
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v5T
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv5t.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv5t.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv5t.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv5t.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,32 @@
@ This test case will check the default .ARM.attributes value for the
@ armv5t architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv5t
@ CHECK-ASM: .arch armv5t
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 26
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05355400 06030801 0901 |.5T.......|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 5T
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v5T
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-1
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv5te.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv5te.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv5te.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv5te.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,32 @@
@ This test case will check the default .ARM.attributes value for the
@ armv5te architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv5te
@ CHECK-ASM: .arch armv5te
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 27
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05355445 00060408 010901 |.5TE.......|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 5TE
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v5TE
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-1
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv6-m.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6-m.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv6-m.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv6-m.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,28 @@
@ This test case will check the default .ARM.attributes value for the
@ armv6-m architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv6-m
@ CHECK-ASM: .arch armv6-m
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 25
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 41180000 00616561 62690001 0E000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05362D4D 00060B09 01 |.6-M.....|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 6-M
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v6-M
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-1
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv6.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv6.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv6.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,32 @@
@ This test case will check the default .ARM.attributes value for the
@ armv6 architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv6
@ CHECK-ASM: .arch armv6
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 25
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 41180000 00616561 62690001 0E000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05360006 06080109 01 |.6.......|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 6
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v6
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-1
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv6j.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6j.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv6j.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv6j.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,32 @@
@ This test case will check the default .ARM.attributes value for the
@ armv6j architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv6j
@ CHECK-ASM: .arch armv6j
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 26
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 41190000 00616561 62690001 0F000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05364A00 06060801 0901 |.6J.......|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 6J
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v6
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-1
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv6t2.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6t2.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv6t2.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv6t2.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,32 @@
@ This test case will check the default .ARM.attributes value for the
@ armv6t2 architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv6t2
@ CHECK-ASM: .arch armv6t2
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 27
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05365432 00060808 010902 |.6T2.......|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 6T2
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v6T2
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-2
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv6z.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6z.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv6z.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv6z.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,36 @@
@ This test case will check the default .ARM.attributes value for the
@ armv6z architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv6z
@ CHECK-ASM: .arch armv6z
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 28
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 411B0000 00616561 62690001 11000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05365A00 06070801 09014401 |.6Z.......D.|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 6Z
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v6KZ
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-1
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: Virtualization_use
+@ CHECK-ATTR: Description: TrustZone
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv6zk.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv6zk.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv6zk.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv6zk.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,36 @@
@ This test case will check the default .ARM.attributes value for the
@ armv6zk architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv6zk
@ CHECK-ASM: .arch armv6zk
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 29
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05365A4B 00060708 01090144 01 |.6ZK.......D.|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 6ZK
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v6KZ
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-1
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: Virtualization_use
+@ CHECK-ATTR: Description: TrustZone
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv7-a.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv7-a.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv7-a.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv7-a.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,36 @@
@ This test case will check the default .ARM.attributes value for the
@ armv7-a architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv7-a
@ CHECK-ASM: .arch armv7-a
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 29
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05372D41 00060A07 41080109 02 |.7-A....A....|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 7-A
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v7
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch_profile
+@ CHECK-ATTR: Description: Application
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-2
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv7-m.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv7-m.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv7-m.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv7-m.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,32 @@
@ This test case will check the default .ARM.attributes value for the
@ armv7-m architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv7-m
@ CHECK-ASM: .arch armv7-m
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 27
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05372D4D 00060A07 4D0902 |.7-M....M..|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 7-M
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v7
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch_profile
+@ CHECK-ATTR: Description: Microcontroller
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-2
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv7-r.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv7-r.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv7-r.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv7-r.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,36 @@
@ This test case will check the default .ARM.attributes value for the
@ armv7-r architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv7-r
@ CHECK-ASM: .arch armv7-r
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 29
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05372D52 00060A07 52080109 02 |.7-R....R....|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 7-R
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v7
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch_profile
+@ CHECK-ATTR: Description: Real-time
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-2
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv7.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv7.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv7.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv7.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,28 @@
@ This test case will check the default .ARM.attributes value for the
@ armv7 architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv7
@ CHECK-ASM: .arch armv7
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 23
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05370006 0A0902 |.7.....|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 7
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v7
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-2
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv7a.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv7a.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv7a.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv7a.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,36 @@
@ This test case will check the default .ARM.attributes value for the
@ armv7-a architecture when using the armv7a alias.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv7a
@ CHECK-ASM: .arch armv7-a
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 29
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05372D41 00060A07 41080109 02 |.7-A....A....|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 7-A
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v7
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch_profile
+@ CHECK-ATTR: Description: Application
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-2
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv7m.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv7m.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv7m.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv7m.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,32 @@
@ This test case will check the default .ARM.attributes value for the
@ armv7-m architecture when using the armv7m alias.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv7m
@ CHECK-ASM: .arch armv7-m
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 27
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 411A0000 00616561 62690001 10000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05372D4D 00060A07 4D0902 |.7-M....M..|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 7-M
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v7
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch_profile
+@ CHECK-ATTR: Description: Microcontroller
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-2
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv7r.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv7r.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv7r.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv7r.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,36 @@
@ This test case will check the default .ARM.attributes value for the
@ armv7-r architecture when using the armv7r alias.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv7r
@ CHECK-ASM: .arch armv7-r
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 29
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05372D52 00060A07 52080109 02 |.7-R....R....|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 7-R
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v7
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch_profile
+@ CHECK-ATTR: Description: Real-time
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-2
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv8-a.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv8-a.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv8-a.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv8-a.s Sat Feb 8 17:17:02 2014
@@ -3,29 +3,44 @@
@ This test case will check the default .ARM.attributes value for the
@ armv8-a architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv8-a
@ CHECK-ASM: .arch armv8-a
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 33
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 41200000 00616561 62690001 16000000 |A ...aeabi......|
-@ CHECK-OBJ: 0010: 05382D41 00060E07 41080109 022A0144 |.8-A....A....*.D|
-@ CHECK-OBJ: 0020: 03 |.|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 8-A
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v8
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch_profile
+@ CHECK-ATTR: Description: Application
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-2
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: MPextension_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: Virtualization_use
+@ CHECK-ATTR: Description: TrustZone + Virtualization Extensions
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-armv8a.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-armv8a.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-armv8a.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-armv8a.s Sat Feb 8 17:17:02 2014
@@ -3,29 +3,44 @@
@ This test case will check the default .ARM.attributes value for the
@ armv8-a architecture when using the armv8a alias.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv8a
@ CHECK-ASM: .arch armv8-a
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 33
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 41200000 00616561 62690001 16000000 |A ...aeabi......|
-@ CHECK-OBJ: 0010: 05382D41 00060E07 41080109 022A0144 |.8-A....A....*.D|
-@ CHECK-OBJ: 0020: 03 |.|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 8-A
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v8
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch_profile
+@ CHECK-ATTR: Description: Application
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-2
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: MPextension_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: Virtualization_use
+@ CHECK-ATTR: Description: TrustZone + Virtualization Extensions
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-iwmmxt.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-iwmmxt.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-iwmmxt.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-iwmmxt.s Sat Feb 8 17:17:02 2014
@@ -3,28 +3,36 @@
@ This test case will check the default .ARM.attributes value for the
@ iwmmxt architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch iwmmxt
@ CHECK-ASM: .arch iwmmxt
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 32
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 411F0000 00616561 62690001 15000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 0549574D 4D585400 06040801 09010B01 |.IWMMXT.........|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: IWMMXT
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v5TE
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-1
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: WMMX_arch
+@ CHECK-ATTR: Description: WMMXv1
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-arch-iwmmxt2.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-arch-iwmmxt2.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-arch-iwmmxt2.s (original)
+++ llvm/trunk/test/MC/ARM/directive-arch-iwmmxt2.s Sat Feb 8 17:17:02 2014
@@ -3,29 +3,36 @@
@ This test case will check the default .ARM.attributes value for the
@ iwmmxt2 architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch iwmmxt2
@ CHECK-ASM: .arch iwmmxt2
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x34
-@ CHECK-OBJ: Size: 33
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 41200000 00616561 62690001 16000000 |A ...aeabi......|
-@ CHECK-OBJ: 0010: 0549574D 4D585432 00060408 0109010B |.IWMMXT2........|
-@ CHECK-OBJ: 0020: 02 |.|
-@ CHECK-OBJ: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: IWMMXT2
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v5TE
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Thumb-1
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: WMMX_arch
+@ CHECK-ATTR: Description: WMMXv2
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
Modified: llvm/trunk/test/MC/ARM/directive-eabi_attribute-overwrite.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-eabi_attribute-overwrite.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-eabi_attribute-overwrite.s (original)
+++ llvm/trunk/test/MC/ARM/directive-eabi_attribute-overwrite.s Sat Feb 8 17:17:02 2014
@@ -1,5 +1,5 @@
-@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s | llvm-readobj -s -sd \
-@ RUN: | FileCheck %s
+@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.thumb
@@ -7,12 +7,11 @@
.eabi_attribute Tag_compatibility, 1
.eabi_attribute Tag_compatibility, 1, "aeabi"
-@ CHECK: Section {
-@ CHECK: Name: .ARM.attributes
-@ CHECK: Type: SHT_ARM_ATTRIBUTES
-@ CHECK: SectionData (
-@ CHECK: 0000: 41170000 00616561 62690001 0D000000
-@ CHECK: 0010: 20014145 41424900
-@ CHECK: )
-@ CHECK: }
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: Value: 1, AEABI
+@ CHECK-ATTR: TagName: compatibility
+@ CHECK-ATTR: Description: AEABI Conformant
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
Modified: llvm/trunk/test/MC/ARM/directive-fpu-multiple.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/directive-fpu-multiple.s?rev=201029&r1=201028&r2=201029&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/directive-fpu-multiple.s (original)
+++ llvm/trunk/test/MC/ARM/directive-fpu-multiple.s Sat Feb 8 17:17:02 2014
@@ -3,24 +3,16 @@
@ The later .fpu directive should overwrite the earlier one.
@ See also: directive-fpu-multiple2.s.
-@ RUN: llvm-mc < %s -triple arm-unknown-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s | llvm-readobj -arm-attributes \
+@ RUN: | FileCheck %s -check-prefix CHECK-ATTR
.fpu neon
.fpu vfpv4
-@ CHECK: Name: .ARM.attributes
-@ CHECK-NEXT: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-NEXT: Flags [ (0x0)
-@ CHECK-NEXT: ]
-@ CHECK-NEXT: Address: 0x0
-@ CHECK-NEXT: Offset: 0x34
-@ CHECK-NEXT: Size: 18
-@ CHECK-NEXT: Link: 0
-@ CHECK-NEXT: Info: 0
-@ CHECK-NEXT: AddressAlignment: 1
-@ CHECK-NEXT: EntrySize: 0
-@ CHECK-NEXT: SectionData (
-@ CHECK-NEXT: 0000: 41110000 00616561 62690001 07000000
-@ CHECK-NEXT: 0010: 0A05
-@ CHECK-NEXT: )
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: FP_arch
+@ CHECK-ATTR: Description: VFPv4
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
+
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