[PATCH] Forbid the use of registers t6, t7 and t8 if the target is MIPS NaCl.
Mark Seaborn
mseaborn at chromium.org
Thu Feb 6 10:13:17 PST 2014
LGTM
================
Comment at: lib/Target/Mips/MipsCallingConv.td:198
@@ +197,3 @@
+
+ // In NaCl, T6, T7 and T8 are reserved and not available as argument
+ // registers for fastcc.
----------------
Can you also address Eric's earlier comment, that it would be good to also say here, briefly, what the registers are reserved for?
================
Comment at: lib/Target/Mips/MipsRegisterInfo.cpp:137
@@ -136,1 +136,3 @@
+ // Reserved for NaCl use.
+ if (Subtarget.isTargetNaCl()) {
----------------
Eric's earlier comment was that comments should be complete sentences. Maybe "These registers are reserved by the NaCl sandbox"?
================
Comment at: test/CodeGen/Mips/nacl-reserved-regs.ll:8
@@ +7,3 @@
+define void @f() {
+entry:
+ %val1 = load volatile i32* @var
----------------
FWIW, you don't need to name the entry block
http://llvm-reviews.chandlerc.com/D2694
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