[llvm] r200617 - [Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterInfo. Also, add CFI instructions to initialize the frame correctly.

[Venkatraman Govindaraju]

Author: venkatra
Date: Sat Feb  1 12:54:16 2014
New Revision: 200617

URL: http://llvm.org/viewvc/llvm-project?rev=200617&view=rev
Log:
[Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterInfo. Also, add CFI instructions to initialize the frame correctly.

Modified:
    llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
    llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp
    llvm/trunk/test/CodeGen/SPARC/exception.ll

Modified: llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp?rev=200617&r1=200616&r2=200617&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp Sat Feb  1 12:54:16 2014
@@ -33,6 +33,25 @@
 
 using namespace llvm;
 
+
+static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI,
+                                       StringRef TT) {
+  MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
+  unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
+  MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, Reg, 0);
+  MAI->addInitialFrameState(Inst);
+  return MAI;
+}
+
+static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI,
+                                       StringRef TT) {
+  MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
+  unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
+  MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, Reg, 2047);
+  MAI->addInitialFrameState(Inst);
+  return MAI;
+}
+
 static MCInstrInfo *createSparcMCInstrInfo() {
   MCInstrInfo *X = new MCInstrInfo();
   InitSparcMCInstrInfo(X);
@@ -41,7 +60,7 @@ static MCInstrInfo *createSparcMCInstrIn
 
 static MCRegisterInfo *createSparcMCRegisterInfo(StringRef TT) {
   MCRegisterInfo *X = new MCRegisterInfo();
-  InitSparcMCRegisterInfo(X, SP::I7);
+  InitSparcMCRegisterInfo(X, SP::O7);
   return X;
 }
 
@@ -136,8 +155,8 @@ static MCInstPrinter *createSparcMCInstP
 
 extern "C" void LLVMInitializeSparcTargetMC() {
   // Register the MC asm info.
-  RegisterMCAsmInfo<SparcELFMCAsmInfo> X(TheSparcTarget);
-  RegisterMCAsmInfo<SparcELFMCAsmInfo> Y(TheSparcV9Target);
+  RegisterMCAsmInfoFn X(TheSparcTarget, createSparcMCAsmInfo);
+  RegisterMCAsmInfoFn Y(TheSparcV9Target, createSparcV9MCAsmInfo);
 
   // Register the MC codegen info.
   TargetRegistry::RegisterMCCodeGenInfo(TheSparcTarget,

Modified: llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp?rev=200617&r1=200616&r2=200617&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcRegisterInfo.cpp Sat Feb  1 12:54:16 2014
@@ -35,7 +35,7 @@ ReserveAppRegisters("sparc-reserve-app-r
                     cl::desc("Reserve application registers (%g2-%g4)"));
 
 SparcRegisterInfo::SparcRegisterInfo(SparcSubtarget &st)
-  : SparcGenRegisterInfo(SP::I7), Subtarget(st) {
+  : SparcGenRegisterInfo(SP::O7), Subtarget(st) {
 }
 
 const uint16_t* SparcRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF)

Modified: llvm/trunk/test/CodeGen/SPARC/exception.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/SPARC/exception.ll?rev=200617&r1=200616&r2=200617&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/SPARC/exception.ll (original)
+++ llvm/trunk/test/CodeGen/SPARC/exception.ll Sat Feb  1 12:54:16 2014
@@ -56,7 +56,11 @@
 ; V8PIC_NOCFI-NEXT:   .word _ZTIi
 ; V8PIC_NOCFI:        .section .eh_frame
 ; V8PIC_NOCFI-NOT:    .section
+; V8PIC_NOCFI:        .byte 15                     ! CIE Return Address Column
 ; V8PIC_NOCFI:        .word %r_disp32(DW.ref.__gxx_personality_v0)
+; V8PIC_NOCFI:        .byte 12                     ! DW_CFA_def_cfa
+; V8PIC_NOCFI:        .byte 14                     ! Reg 14
+; V8PIC_NOCFI-NEXT:   .byte 0                      ! Offset 0
 ; V8PIC_NOCFI:        .word %r_disp32(.Ltmp{{.+}}) ! FDE initial location
 
 
@@ -94,7 +98,11 @@
 ; V9PIC_NOCFI-NEXT:   .xword _ZTIi
 ; V9PIC_NOCFI:        .section .eh_frame
 ; V9PIC_NOCFI-NOT:    .section
+; V9PIC_NOCFI:        .byte 15                     ! CIE Return Address Column
 ; V9PIC_NOCFI:        .word %r_disp32(DW.ref.__gxx_personality_v0)
+; V9PIC_NOCFI:        .byte 12                     ! DW_CFA_def_cfa
+; V9PIC_NOCFI-NEXT:   .byte 14                     ! Reg 14
+; V9PIC_NOCFI:        .ascii "\377\017"            ! Offset 2047
 ; V9PIC_NOCFI:        .word %r_disp32(.Ltmp{{.+}}) ! FDE initial location
 
 define i32 @main(i32 %argc, i8** nocapture readnone %argv) unnamed_addr #0 {