[llvm] r199741 - [mips][sched] Renamed II_FsqrtSingle and II_FsqrtDouble to II_SQRT_S and II_SQRT_D respectively

Daniel Sanders daniel.sanders at imgtec.com
Tue Jan 21 05:36:46 PST 2014


Author: dsanders
Date: Tue Jan 21 07:36:45 2014
New Revision: 199741

URL: http://llvm.org/viewvc/llvm-project?rev=199741&view=rev
Log:
[mips][sched] Renamed II_FsqrtSingle and II_FsqrtDouble to II_SQRT_S and II_SQRT_D respectively

No functional change


Modified:
    llvm/trunk/lib/Target/Mips/MicroMipsInstrFPU.td
    llvm/trunk/lib/Target/Mips/MipsInstrFPU.td
    llvm/trunk/lib/Target/Mips/MipsSchedule.td

Modified: llvm/trunk/lib/Target/Mips/MicroMipsInstrFPU.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MicroMipsInstrFPU.td?rev=199741&r1=199740&r2=199741&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MicroMipsInstrFPU.td (original)
+++ llvm/trunk/lib/Target/Mips/MicroMipsInstrFPU.td Tue Jan 21 07:36:45 2014
@@ -52,7 +52,7 @@ def ROUND_W_S_MM : MMRel, ABSS_FT<"round
                    ROUND_W_FM_MM<0, 0xec>;
 def TRUNC_W_S_MM : MMRel, ABSS_FT<"trunc.w.s", FGR32Opnd, FGR32Opnd, II_TRUNC>,
                    ROUND_W_FM_MM<0, 0xac>;
-def FSQRT_S_MM : MMRel, ABSS_FT<"sqrt.s", FGR32Opnd, FGR32Opnd,IIFsqrtSingle,
+def FSQRT_S_MM : MMRel, ABSS_FT<"sqrt.s", FGR32Opnd, FGR32Opnd, II_SQRT_S,
                                 fsqrt>, ROUND_W_FM_MM<0, 0x28>;
 
 def CEIL_W_MM  : MMRel, ABSS_FT<"ceil.w.d", FGR32Opnd, AFGR64Opnd, II_CEIL>,
@@ -66,8 +66,8 @@ def ROUND_W_MM : MMRel, ABSS_FT<"round.w
 def TRUNC_W_MM : MMRel, ABSS_FT<"trunc.w.d", FGR32Opnd, AFGR64Opnd, II_TRUNC>,
                  ROUND_W_FM_MM<1, 0xac>;
 
-def FSQRT_MM : MMRel, ABSS_FT<"sqrt.d", AFGR64Opnd, AFGR64Opnd,
-                              IIFsqrtDouble, fsqrt>, ROUND_W_FM_MM<1, 0x28>;
+def FSQRT_MM : MMRel, ABSS_FT<"sqrt.d", AFGR64Opnd, AFGR64Opnd, II_SQRT_D,
+                              fsqrt>, ROUND_W_FM_MM<1, 0x28>;
 
 def CVT_L_S_MM   : MMRel, ABSS_FT<"cvt.l.s", FGR64Opnd, FGR32Opnd, II_CVT>,
                    ROUND_W_FM_MM<0, 0x4>;

Modified: llvm/trunk/lib/Target/Mips/MipsInstrFPU.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsInstrFPU.td?rev=199741&r1=199740&r2=199741&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsInstrFPU.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsInstrFPU.td Tue Jan 21 07:36:45 2014
@@ -331,9 +331,9 @@ let Predicates = [NoNaNsFPMath, HasStdEn
   defm FNEG : ABSS_M<"neg.d", II_NEG, fneg>, ABSS_FM<0x7, 17>;
 }
 
-def FSQRT_S : MMRel, ABSS_FT<"sqrt.s", FGR32Opnd, FGR32Opnd, IIFsqrtSingle,
-               fsqrt>, ABSS_FM<0x4, 16>;
-defm FSQRT : ABSS_M<"sqrt.d", IIFsqrtDouble, fsqrt>, ABSS_FM<0x4, 17>;
+def FSQRT_S : MMRel, ABSS_FT<"sqrt.s", FGR32Opnd, FGR32Opnd, II_SQRT_S, fsqrt>,
+              ABSS_FM<0x4, 16>;
+defm FSQRT : ABSS_M<"sqrt.d", II_SQRT_D, fsqrt>, ABSS_FM<0x4, 17>;
 
 // The odd-numbered registers are only referenced when doing loads,
 // stores, and moves between floating-point and integer registers.

Modified: llvm/trunk/lib/Target/Mips/MipsSchedule.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSchedule.td?rev=199741&r1=199740&r2=199741&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSchedule.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsSchedule.td Tue Jan 21 07:36:45 2014
@@ -20,8 +20,6 @@ def IIAlu              : InstrItinClass;
 def IILoad             : InstrItinClass;
 def IIStore            : InstrItinClass;
 def IIBranch           : InstrItinClass;
-def IIFsqrtSingle      : InstrItinClass;
-def IIFsqrtDouble      : InstrItinClass;
 def IIFrecipFsqrtStep  : InstrItinClass;
 def IIFLoad            : InstrItinClass;
 def IIFStore           : InstrItinClass;
@@ -116,6 +114,8 @@ def II_SLL              : InstrItinClass
 def II_SLLV             : InstrItinClass;
 def II_SLTI_SLTIU       : InstrItinClass; // slti and sltiu
 def II_SLT_SLTU         : InstrItinClass; // slt and sltu
+def II_SQRT_D           : InstrItinClass;
+def II_SQRT_S           : InstrItinClass;
 def II_SRA              : InstrItinClass;
 def II_SRAV             : InstrItinClass;
 def II_SRL              : InstrItinClass;
@@ -227,8 +227,8 @@ def MipsGenericItineraries : ProcessorIt
   InstrItinData<II_NMSUB_D         , [InstrStage<8,  [ALU]>]>,
   InstrItinData<II_DIV_S           , [InstrStage<23, [ALU]>]>,
   InstrItinData<II_DIV_D           , [InstrStage<36, [ALU]>]>,
-  InstrItinData<IIFsqrtSingle      , [InstrStage<54, [ALU]>]>,
-  InstrItinData<IIFsqrtDouble      , [InstrStage<12, [ALU]>]>,
+  InstrItinData<II_SQRT_S          , [InstrStage<54, [ALU]>]>,
+  InstrItinData<II_SQRT_D          , [InstrStage<12, [ALU]>]>,
   InstrItinData<IIFrecipFsqrtStep  , [InstrStage<5,  [ALU]>]>,
   InstrItinData<IIFLoad            , [InstrStage<3,  [ALU]>]>,
   InstrItinData<IIFStore           , [InstrStage<1,  [ALU]>]>,





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