[PATCH 6/8] [x86] Allow segment and address-size overrides for OUTS[BWLQ] (PR9385)
David Woodhouse
dwmw2 at infradead.org
Mon Jan 20 07:24:13 PST 2014
---
lib/Target/X86/AsmParser/X86AsmParser.cpp | 20 ++++++++++----------
lib/Target/X86/X86InstrInfo.td | 9 ++++++---
test/MC/X86/index-operations.s | 10 ++++++++++
test/MC/X86/x86-16.s | 6 +++---
test/MC/X86/x86-32.s | 6 +++---
test/MC/X86/x86-64.s | 6 +++---
6 files changed, 35 insertions(+), 22 deletions(-)
diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp
index d6b2ad4..a23f5a2 100644
--- a/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -2345,16 +2345,16 @@ ParseInstruction(ParseInstructionInfo &Info, StringRef Name, SMLoc NameLoc,
}
}
- // Transform "outs[bwl] %ds:(%esi), %dx" into "out[bwl]"
- if (Name.startswith("outs") && Operands.size() == 3 &&
- (Name == "outsb" || Name == "outsw" || Name == "outsl")) {
- X86Operand &Op = *(X86Operand*)Operands.begin()[1];
- X86Operand &Op2 = *(X86Operand*)Operands.begin()[2];
- if (isSrcOp(Op) && Op2.isReg() && Op2.getReg() == X86::DX) {
- Operands.pop_back();
- Operands.pop_back();
- delete &Op;
- delete &Op2;
+ // Append default arguments to "outs[bwld]"
+ if (Name.startswith("outs") && Operands.size() == 1 &&
+ (Name == "outsb" || Name == "outsw" || Name == "outsl" ||
+ Name == "outsd" )) {
+ if (isParsingIntelSyntax()) {
+ Operands.push_back(DefaultMemSIOperand(NameLoc));
+ Operands.push_back(X86Operand::CreateReg(X86::DX, NameLoc, NameLoc));
+ } else {
+ Operands.push_back(DefaultMemSIOperand(NameLoc));
+ Operands.push_back(X86Operand::CreateReg(X86::DX, NameLoc, NameLoc));
}
}
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 13c3102..2885bb5 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -1772,9 +1772,12 @@ def LODSQ : RI<0xAD, RawFrmSrc, (outs), (ins srcidx64:$src),
}
let SchedRW = [WriteSystem] in {
-def OUTSB : I<0x6E, RawFrm, (outs), (ins), "outsb", [], IIC_OUTS>;
-def OUTSW : I<0x6F, RawFrm, (outs), (ins), "outsw", [], IIC_OUTS>, OpSize;
-def OUTSL : I<0x6F, RawFrm, (outs), (ins), "outs{l|d}", [], IIC_OUTS>, OpSize16;
+def OUTSB : I<0x6E, RawFrmSrc, (outs), (ins srcidx8:$src),
+ "outsb\t{$src, %dx|dx, $src}", [], IIC_OUTS>;
+def OUTSW : I<0x6F, RawFrmSrc, (outs), (ins srcidx16:$src),
+ "outsw\t{$src, %dx|dx, $src}", [], IIC_OUTS>, OpSize;
+def OUTSL : I<0x6F, RawFrmSrc, (outs), (ins srcidx32:$src),
+ "outs{l|d}\t{$src, %dx|dx, $src}", [], IIC_OUTS>, OpSize16;
}
// Flag instructions
diff --git a/test/MC/X86/index-operations.s b/test/MC/X86/index-operations.s
index bf6d87f..85bae21 100644
--- a/test/MC/X86/index-operations.s
+++ b/test/MC/X86/index-operations.s
@@ -129,3 +129,13 @@ movsl %gs:(%esi), (%edi)
// 64: movsl %gs:(%esi), %es:(%edi) # encoding: [0x65,0x67,0xa5]
// 32: movsl %gs:(%esi), %es:(%edi) # encoding: [0x65,0xa5]
// 16: movsl %gs:(%esi), %es:(%edi) # encoding: [0x66,0x65,0x67,0xa5]
+
+outsb
+// 64: outsb (%rsi), %dx # encoding: [0x6e]
+// 32: outsb (%esi), %dx # encoding: [0x6e]
+// 16: outsb (%si), %dx # encoding: [0x6e]
+
+outsw %fs:(%esi), %dx
+// 64: outsw %fs:(%esi), %dx # encoding: [0x66,0x64,0x67,0x6f]
+// 32: outsw %fs:(%esi), %dx # encoding: [0x66,0x64,0x6f]
+// 16: outsw %fs:(%esi), %dx # encoding: [0x64,0x67,0x6f]
diff --git a/test/MC/X86/x86-16.s b/test/MC/X86/x86-16.s
index ae700fa..a147cdd 100644
--- a/test/MC/X86/x86-16.s
+++ b/test/MC/X86/x86-16.s
@@ -789,21 +789,21 @@ pshufw $90, %mm4, %mm0
// CHECK: encoding: [0xe0,A]
loopnz 0
-// CHECK: outsb # encoding: [0x6e]
+// CHECK: outsb (%si), %dx # encoding: [0x6e]
// CHECK: outsb
// CHECK: outsb
outsb
outsb %ds:(%si), %dx
outsb (%si), %dx
-// CHECK: outsw # encoding: [0x6f]
+// CHECK: outsw (%si), %dx # encoding: [0x6f]
// CHECK: outsw
// CHECK: outsw
outsw
outsw %ds:(%si), %dx
outsw (%si), %dx
-// CHECK: outsl # encoding: [0x66,0x6f]
+// CHECK: outsl (%si), %dx # encoding: [0x66,0x6f]
// CHECK: outsl
outsl
outsl %ds:(%si), %dx
diff --git a/test/MC/X86/x86-32.s b/test/MC/X86/x86-32.s
index 3d75c6f..cb5a36a 100644
--- a/test/MC/X86/x86-32.s
+++ b/test/MC/X86/x86-32.s
@@ -865,21 +865,21 @@ pshufw $90, %mm4, %mm0
// CHECK: encoding: [0xe0,A]
loopnz 0
-// CHECK: outsb # encoding: [0x6e]
+// CHECK: outsb (%esi), %dx # encoding: [0x6e]
// CHECK: outsb
// CHECK: outsb
outsb
outsb %ds:(%esi), %dx
outsb (%esi), %dx
-// CHECK: outsw # encoding: [0x66,0x6f]
+// CHECK: outsw (%esi), %dx # encoding: [0x66,0x6f]
// CHECK: outsw
// CHECK: outsw
outsw
outsw %ds:(%esi), %dx
outsw (%esi), %dx
-// CHECK: outsl # encoding: [0x6f]
+// CHECK: outsl (%esi), %dx # encoding: [0x6f]
// CHECK: outsl
outsl
outsl %ds:(%esi), %dx
diff --git a/test/MC/X86/x86-64.s b/test/MC/X86/x86-64.s
index e39cefe..f676351 100644
--- a/test/MC/X86/x86-64.s
+++ b/test/MC/X86/x86-64.s
@@ -1050,21 +1050,21 @@ xsetbv // CHECK: xsetbv # encoding: [0x0f,0x01,0xd1]
// CHECK: encoding: [0xe0,A]
loopnz 0
-// CHECK: outsb # encoding: [0x6e]
+// CHECK: outsb (%rsi), %dx # encoding: [0x6e]
// CHECK: outsb
// CHECK: outsb
outsb
outsb %ds:(%rsi), %dx
outsb (%rsi), %dx
-// CHECK: outsw # encoding: [0x66,0x6f]
+// CHECK: outsw (%rsi), %dx # encoding: [0x66,0x6f]
// CHECK: outsw
// CHECK: outsw
outsw
outsw %ds:(%rsi), %dx
outsw (%rsi), %dx
-// CHECK: outsl # encoding: [0x6f]
+// CHECK: outsl (%rsi), %dx # encoding: [0x6f]
// CHECK: outsl
outsl
outsl %ds:(%rsi), %dx
--
1.8.4.2
--
dwmw2
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