[llvm] r199649 - [x86] Infer disassembler mode from SubtargetInfo feature bits
David Woodhouse
dwmw2 at infradead.org
Mon Jan 20 04:02:31 PST 2014
Author: dwmw2
Date: Mon Jan 20 06:02:31 2014
New Revision: 199649
URL: http://llvm.org/viewvc/llvm-project?rev=199649&view=rev
Log:
[x86] Infer disassembler mode from SubtargetInfo feature bits
Aside from cleaning up the code, this also adds support for the -code16
environment and actually enables the MODE_16BIT mode that was previously
not accessible.
There is no point adding any testing for 16-bit yet though; basically
nothing will work because we aren't handling the OpSize prefix correctly
for 16-bit mode.
Modified:
llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp
llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.h
Modified: llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp?rev=199649&r1=199648&r2=199649&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp (original)
+++ llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp Mon Jan 20 06:02:31 2014
@@ -31,6 +31,8 @@
#include "X86GenRegisterInfo.inc"
#define GET_INSTRINFO_ENUM
#include "X86GenInstrInfo.inc"
+#define GET_SUBTARGETINFO_ENUM
+#include "X86GenSubtargetInfo.inc"
using namespace llvm;
using namespace llvm::X86Disassembler;
@@ -73,9 +75,23 @@ static bool translateInstruction(MCInst
const MCDisassembler *Dis);
X86GenericDisassembler::X86GenericDisassembler(const MCSubtargetInfo &STI,
- DisassemblerMode mode,
const MCInstrInfo *MII)
- : MCDisassembler(STI), MII(MII), fMode(mode) {}
+ : MCDisassembler(STI), MII(MII) {
+ switch (STI.getFeatureBits() &
+ (X86::Mode16Bit | X86::Mode32Bit | X86::Mode64Bit)) {
+ case X86::Mode16Bit:
+ fMode = MODE_16BIT;
+ break;
+ case X86::Mode32Bit:
+ fMode = MODE_32BIT;
+ break;
+ case X86::Mode64Bit:
+ fMode = MODE_64BIT;
+ break;
+ default:
+ llvm_unreachable("Invalid CPU mode");
+ }
+}
X86GenericDisassembler::~X86GenericDisassembler() {
delete MII;
@@ -737,22 +753,16 @@ static bool translateInstruction(MCInst
return false;
}
-static MCDisassembler *createX86_32Disassembler(const Target &T,
- const MCSubtargetInfo &STI) {
- return new X86Disassembler::X86GenericDisassembler(STI, MODE_32BIT,
- T.createMCInstrInfo());
-}
-
-static MCDisassembler *createX86_64Disassembler(const Target &T,
- const MCSubtargetInfo &STI) {
- return new X86Disassembler::X86GenericDisassembler(STI, MODE_64BIT,
+static MCDisassembler *createX86Disassembler(const Target &T,
+ const MCSubtargetInfo &STI) {
+ return new X86Disassembler::X86GenericDisassembler(STI,
T.createMCInstrInfo());
}
extern "C" void LLVMInitializeX86Disassembler() {
// Register the disassembler.
TargetRegistry::RegisterMCDisassembler(TheX86_32Target,
- createX86_32Disassembler);
+ createX86Disassembler);
TargetRegistry::RegisterMCDisassembler(TheX86_64Target,
- createX86_64Disassembler);
+ createX86Disassembler);
}
Modified: llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.h?rev=199649&r1=199648&r2=199649&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.h (original)
+++ llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.h Mon Jan 20 06:02:31 2014
@@ -105,9 +105,7 @@ class X86GenericDisassembler : public MC
public:
/// Constructor - Initializes the disassembler.
///
- /// @param mode - The X86 architecture mode to decode for.
- X86GenericDisassembler(const MCSubtargetInfo &STI, DisassemblerMode mode,
- const MCInstrInfo *MII);
+ X86GenericDisassembler(const MCSubtargetInfo &STI, const MCInstrInfo *MII);
private:
~X86GenericDisassembler();
public:
More information about the llvm-commits
mailing list