[llvm] r199559 - ARM: Let the assembler reject v5 instructions in v4 mode.
Benjamin Kramer
benny.kra at googlemail.com
Sat Jan 18 11:03:20 PST 2014
Author: d0k
Date: Sat Jan 18 13:03:19 2014
New Revision: 199559
URL: http://llvm.org/viewvc/llvm-project?rev=199559&view=rev
Log:
ARM: Let the assembler reject v5 instructions in v4 mode.
PR18524.
Added:
llvm/trunk/test/MC/ARM/not-armv4.s
Modified:
llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=199559&r1=199558&r2=199559&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Sat Jan 18 13:03:19 2014
@@ -186,7 +186,8 @@ def ARMvminnm : SDNode<"ARMISD::V
def HasV4T : Predicate<"Subtarget->hasV4TOps()">,
AssemblerPredicate<"HasV4TOps", "armv4t">;
def NoV4T : Predicate<"!Subtarget->hasV4TOps()">;
-def HasV5T : Predicate<"Subtarget->hasV5TOps()">;
+def HasV5T : Predicate<"Subtarget->hasV5TOps()">,
+ AssemblerPredicate<"HasV5TOps", "armv5t">;
def HasV5TE : Predicate<"Subtarget->hasV5TEOps()">,
AssemblerPredicate<"HasV5TEOps", "armv5te">;
def HasV6 : Predicate<"Subtarget->hasV6Ops()">,
Added: llvm/trunk/test/MC/ARM/not-armv4.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/not-armv4.s?rev=199559&view=auto
==============================================================================
--- llvm/trunk/test/MC/ARM/not-armv4.s (added)
+++ llvm/trunk/test/MC/ARM/not-armv4.s Sat Jan 18 13:03:19 2014
@@ -0,0 +1,8 @@
+@ RUN: not llvm-mc < %s -triple armv4-unknown-unknown -show-encoding 2>&1 | FileCheck %s
+
+@ PR18524
+@ CHECK: error: instruction requires: armv5t
+clz r4,r9
+
+@ CHECK: error: instruction requires: armv6t2
+rbit r4,r9
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