[llvm] r199478 - Add OpSize16 flags to 32-bit CRC32 instructions so they can be encoded correctly in 16-bit mode.

Craig Topper craig.topper at gmail.com
Fri Jan 17 00:01:20 PST 2014


Author: ctopper
Date: Fri Jan 17 02:01:20 2014
New Revision: 199478

URL: http://llvm.org/viewvc/llvm-project?rev=199478&view=rev
Log:
Add OpSize16 flags to 32-bit CRC32 instructions so they can be encoded correctly in 16-bit mode.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrSSE.td

Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=199478&r1=199477&r2=199478&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Fri Jan 17 02:01:20 2014
@@ -7487,9 +7487,9 @@ let Constraints = "$src1 = $dst" in {
   def CRC32r32r16 : SS42I_crc32r<0xF1, "crc32{w}", GR32, GR16,
                                  int_x86_sse42_crc32_32_16>, OpSize;
   def CRC32r32m32 : SS42I_crc32m<0xF1, "crc32{l}", GR32, i32mem,
-                                 int_x86_sse42_crc32_32_32>;
+                                 int_x86_sse42_crc32_32_32>, OpSize16;
   def CRC32r32r32 : SS42I_crc32r<0xF1, "crc32{l}", GR32, GR32,
-                                 int_x86_sse42_crc32_32_32>;
+                                 int_x86_sse42_crc32_32_32>, OpSize16;
   def CRC32r64m64 : SS42I_crc32m<0xF1, "crc32{q}", GR64, i64mem,
                                  int_x86_sse42_crc32_64_64>, REX_W;
   def CRC32r64r64 : SS42I_crc32r<0xF1, "crc32{q}", GR64, GR64,





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