[llvm] r199366 - AVX-512: fixed a compare pattern

[Elena Demikhovsky]

Author: delena
Date: Thu Jan 16 02:45:54 2014
New Revision: 199366

URL: http://llvm.org/viewvc/llvm-project?rev=199366&view=rev
Log:
AVX-512: fixed a compare pattern

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/test/CodeGen/X86/avx512-cmp.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=199366&r1=199365&r2=199366&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Jan 16 02:45:54 2014
@@ -9544,6 +9544,11 @@ SDValue X86TargetLowering::EmitTest(SDVa
                                     SelectionDAG &DAG) const {
   SDLoc dl(Op);
 
+  if (Op.getValueType() == MVT::i1)
+    // KORTEST instruction should be selected
+    return DAG.getNode(X86ISD::CMP, dl, MVT::i32, Op,
+                       DAG.getConstant(0, Op.getValueType()));
+
   // CF and OF aren't always set the way we want. Determine which
   // of these we need.
   bool NeedCF = false;
@@ -9560,15 +9565,14 @@ SDValue X86TargetLowering::EmitTest(SDVa
     NeedOF = true;
     break;
   }
-
   // See if we can use the EFLAGS value from the operand instead of
   // doing a separate TEST. TEST always sets OF and CF to 0, so unless
   // we prove that the arithmetic won't overflow, we can't use OF or CF.
   if (Op.getResNo() != 0 || NeedOF || NeedCF) {
     // Emit a CMP with 0, which is the TEST pattern.
-    if (Op.getValueType() == MVT::i1)
-      return DAG.getNode(X86ISD::CMP, dl, MVT::i1, Op,
-                         DAG.getConstant(0, MVT::i1));
+    //if (Op.getValueType() == MVT::i1)
+    //  return DAG.getNode(X86ISD::CMP, dl, MVT::i1, Op,
+    //                     DAG.getConstant(0, MVT::i1));
     return DAG.getNode(X86ISD::CMP, dl, MVT::i32, Op,
                        DAG.getConstant(0, Op.getValueType()));
   }
@@ -9762,10 +9766,10 @@ SDValue X86TargetLowering::EmitCmp(SDVal
       return EmitTest(Op0, X86CC, DAG);
 
      if (Op0.getValueType() == MVT::i1) {
+       // invert the value
       Op0 = DAG.getNode(ISD::XOR, dl, MVT::i1, Op0,
                         DAG.getConstant(-1, MVT::i1));
-      return DAG.getNode(X86ISD::CMP, dl, MVT::i1, Op0,
-                         DAG.getConstant(0, MVT::i1));
+      return EmitTest(Op0, X86CC, DAG);
      }
   }
  

Modified: llvm/trunk/test/CodeGen/X86/avx512-cmp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-cmp.ll?rev=199366&r1=199365&r2=199366&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-cmp.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-cmp.ll Thu Jan 16 02:45:54 2014
@@ -96,3 +96,12 @@ entry:
   ret i32 %or
 }
 
+define i32 @test8(i32 %a1, i32 %a2, i32 %a3) {
+  %tmp1 = icmp eq i32 %a1, -1
+  %tmp2 = icmp eq i32 %a2, -2147483648
+  %tmp3 = and i1 %tmp1, %tmp2
+  %tmp4 = icmp eq i32 %a3, 0
+  %tmp5 = or i1 %tmp3, %tmp4
+  %res = select i1 %tmp5, i32 1, i32 %a3
+  ret i32 %res
+  }
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