[PATCH v2 0/14] [x86] Fix 16-bit addressing modes (PR18220) and implement .code16 (PR8684)

[Jim Grosbach]

On Dec 21, 2013, at 3:05 AM, David Woodhouse <dwmw2 at infradead.org> wrote:

> On Fri, 2013-12-20 at 21:16 +0000, David Woodhouse wrote:
>> 
>> I'm guessing the relocation fixups are happening after the .code16
>> switch has been processed? How does this work?
> 
> This is a pre-existing bug. I've produced a test case using only .code32
> and .code64, and filed PR18303.
> 
> http://llvm.org/bugs/show_bug.cgi?id=18303
> 
> It does hurt us a *lot* more with .code16 though :)
> 

I’ll try to dig into the meat of this a bit more once I’m a bit more out from under my holiday email deluge (today is my first day back in the office), but this part in particular is the same issue as the ARM backend is having for ARM/Thumb mode switching directives. Prior to the holiday break there were a sequence of patches zeroing in on a solution for that which perhaps may be applicable here as well.

-Jim


> -- 
> David Woodhouse                            Open Source Technology Centre
> David.Woodhouse at intel.com                              Intel Corporation
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