[llvm] r198564 - Remove opcode from MOV32r0 that I accidentally left when I converted it to Pseudo. Remove FIXME as well.

[Craig Topper]

Author: ctopper
Date: Sun Jan  5 13:25:13 2014
New Revision: 198564

URL: http://llvm.org/viewvc/llvm-project?rev=198564&view=rev
Log:
Remove opcode from MOV32r0 that I accidentally left when I converted it to Pseudo. Remove FIXME as well.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrCompiler.td

Modified: llvm/trunk/lib/Target/X86/X86InstrCompiler.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrCompiler.td?rev=198564&r1=198563&r2=198564&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrCompiler.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrCompiler.td Sun Jan  5 13:25:13 2014
@@ -220,10 +220,9 @@ def MORESTACK_RET_RESTORE_R10 : I<0, Pse
 
 // Alias instruction mapping movr0 to xor.
 // FIXME: remove when we can teach regalloc that xor reg, reg is ok.
-// FIXME: Set encoding to pseudo.
 let Defs = [EFLAGS], isReMaterializable = 1, isAsCheapAsAMove = 1,
     isPseudo = 1 in
-def MOV32r0  : I<0x31, Pseudo, (outs GR32:$dst), (ins), "",
+def MOV32r0  : I<0, Pseudo, (outs GR32:$dst), (ins), "",
                  [(set GR32:$dst, 0)], IIC_ALU_NONMEM>, Sched<[WriteZero]>;
 
 // Other widths can also make use of the 32-bit xor, which may have a smaller