[llvm] r198194 - For AArch64 Neon, simplify scalar dup by lane0 for fp.

[Jiangning Liu]

Author: jiangning
Date: Sun Dec 29 20:44:35 2013
New Revision: 198194

URL: http://llvm.org/viewvc/llvm-project?rev=198194&view=rev
Log:
For AArch64 Neon, simplify scalar dup by lane0 for fp.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64InstrNEON.td
    llvm/trunk/test/CodeGen/AArch64/neon-scalar-copy.ll

Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrNEON.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrNEON.td?rev=198194&r1=198193&r2=198194&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstrNEON.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64InstrNEON.td Sun Dec 29 20:44:35 2013
@@ -5954,23 +5954,28 @@ def DUPdv_D : NeonI_Scalar_DUP<"dup", "d
   let Inst{20-16} = {Imm, 0b1, 0b0, 0b0, 0b0};
 }
 
-multiclass NeonI_Scalar_DUP_Elt_pattern<Instruction DUPI, ValueType ResTy,
-  ValueType OpTy, Operand OpImm,
-  ValueType OpNTy, ValueType ExTy, Operand OpNImm> {
-  def : Pat<(ResTy (vector_extract (OpTy VPR128:$Rn), OpImm:$Imm)),
-            (ResTy (DUPI (OpTy VPR128:$Rn), OpImm:$Imm))>;
+def : Pat<(f32 (vector_extract (v4f32 VPR128:$Rn), 0)),
+          (f32 (EXTRACT_SUBREG (v4f32 VPR128:$Rn), sub_32))>;
+def : Pat<(f32 (vector_extract (v4f32 VPR128:$Rn), 1)),
+          (f32 (DUPsv_S (v4f32 VPR128:$Rn), 1))>;
+def : Pat<(f32 (vector_extract (v4f32 VPR128:$Rn), 2)),
+          (f32 (DUPsv_S (v4f32 VPR128:$Rn), 2))>;
+def : Pat<(f32 (vector_extract (v4f32 VPR128:$Rn), 3)),
+          (f32 (DUPsv_S (v4f32 VPR128:$Rn), 3))>;
 
-  def : Pat<(ResTy (vector_extract (OpNTy VPR64:$Rn), OpNImm:$Imm)),
-            (ResTy (DUPI
-              (ExTy (SUBREG_TO_REG (i64 0), VPR64:$Rn, sub_64)),
-                OpNImm:$Imm))>;
-}
+def : Pat<(f64 (vector_extract (v2f64 VPR128:$Rn), 0)),
+          (f64 (EXTRACT_SUBREG (v2f64 VPR128:$Rn), sub_64))>;
+def : Pat<(f64 (vector_extract (v2f64 VPR128:$Rn), 1)),
+          (f64 (DUPdv_D (v2f64 VPR128:$Rn), 1))>;
+
+def : Pat<(f32 (vector_extract (v2f32 VPR64:$Rn), 0)),
+          (f32 (EXTRACT_SUBREG (v2f32 VPR64:$Rn), sub_32))>;
+def : Pat<(f32 (vector_extract (v2f32 VPR64:$Rn), 1)),
+          (f32 (DUPsv_S (v4f32 (SUBREG_TO_REG (i64 0), VPR64:$Rn, sub_64)),
+            1))>;
 
-// Patterns for vector extract of FP data using scalar DUP instructions
-defm : NeonI_Scalar_DUP_Elt_pattern<DUPsv_S, f32,
-  v4f32, neon_uimm2_bare, v2f32, v4f32, neon_uimm1_bare>;
-defm : NeonI_Scalar_DUP_Elt_pattern<DUPdv_D, f64,
-  v2f64, neon_uimm1_bare, v1f64, v2f64, neon_uimm0_bare>;
+def : Pat<(f64 (vector_extract (v1f64 VPR64:$Rn), 0)),
+          (f64 (EXTRACT_SUBREG (v1f64 VPR64:$Rn), sub_64))>;
 
 multiclass NeonI_Scalar_DUP_Ext_Vec_pattern<Instruction DUPI,
   ValueType ResTy, ValueType OpTy,Operand OpLImm,

Modified: llvm/trunk/test/CodeGen/AArch64/neon-scalar-copy.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/neon-scalar-copy.ll?rev=198194&r1=198193&r2=198194&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/neon-scalar-copy.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/neon-scalar-copy.ll Sun Dec 29 20:44:35 2013
@@ -7,9 +7,18 @@ define float @test_dup_sv2S(<2 x float>
  ret float  %tmp1
 }
 
+define float @test_dup_sv2S_0(<2 x float> %v) {
+ ;CHECK-LABEL: test_dup_sv2S_0
+ ;CHECK-NOT: dup {{s[0-9]+}}, {{v[0-9]+}}.s[0]
+ ;CHECK: ret
+ %tmp1 = extractelement <2 x float> %v, i32 0
+ ret float  %tmp1
+}
+
 define float @test_dup_sv4S(<4 x float> %v) {
- ;CHECK: test_dup_sv4S
- ;CHECK: dup {{s[0-9]+}}, {{v[0-9]+}}.s[0]
+ ;CHECK-LABEL: test_dup_sv4S
+ ;CHECK-NOT: dup {{s[0-9]+}}, {{v[0-9]+}}.s[0]
+ ;CHECK: ret
  %tmp1 = extractelement <4 x float> %v, i32 0
  ret float  %tmp1
 }
@@ -28,6 +37,14 @@ define double @test_dup_dv2D(<2 x double
  %tmp1 = extractelement <2 x double> %v, i32 1
  ret double  %tmp1
 }
+
+define double @test_dup_dv2D_0(<2 x double> %v) {
+ ;CHECK: test_dup_dv2D_0
+ ;CHECK-NOT: dup {{d[0-9]+}}, {{v[0-9]+}}.d[0]
+ ;CHECK: ret
+ %tmp1 = extractelement <2 x double> %v, i32 1
+ ret double  %tmp1
+}
 
 define <1 x i8> @test_vector_dup_bv16B(<16 x i8> %v1) {
  ;CHECK: test_vector_dup_bv16B