[PATCH][x86][part 2/2] Teach how to fold target specific dags for packed shifts by immedate count into build_vector.

[Nadav Rotem]

Andrea, this LGTM. Please commit. Thanks!

Sent from my iPhone

> On Dec 27, 2013, at 17:18, Andrea Di Biagio <andrea.dibiagio at gmail.com> wrote:
> 
> Hi,
> 
> This patch implement the second part of a fix for a poor code-gen bug
> originally discussed here:
> http://thread.gmane.org/gmane.comp.compilers.llvm.cvs/169801
> 
> The goal of this patch is to teach the x86 backend how to fold a
> target specific dag node for packed vector shift by immedate count
> (VSHLI/VSRLI/VSRAI) into a build_vector when the vector in input to
> the shift is a build_vector of all constants or undef.
> 
> Example:
> ////
> define <4 x i32> @test() {
>  %1 = tail call <4 x i32> @llvm.x86.sse2.pslli.d(<4 x i32> <i32 1,
> i32 2, i32 4, i32 8>, i32 3)
>  ret <4 x i32> %1
> }
> ////
> 
> Before this patch, llc (-mtriple x86_64-unknown-linux-gnu -mattr=sse2)
> generated the following assembly sequence:
>    movdqa    .LCPI0_0(%rip), %xmm0
>    pslld    $3, %xmm0
> 
> With this patch, the packed shift is correctly folded into a load from
> constant pool:
>    movaps    .LCPI0_0(%rip), %xmm0
> 
> Target specific nodes for packed shifts by immediate count are in
> general introduced by function 'getTargetVShiftByConstNode' (in
> X86ISelLowering.cpp) when lowering shift operations, SSE/AVX immediate
> shift intrinsics and (only in very few cases) SIGN_EXTEND_INREG dag
> nodes.
> 
> This patch adds extra rules for simplifying vector shifts inside
> function 'getTargetVShiftByConstNode'.
> 
> I added file test/CodeGen/X86/vec_shift5.ll to verify that packed
> shifts by immediate are correctly folded into a build_vector when the
> input vector to the shift dag node is a vector of constants or undefs.
> 
> Please let me know if this patch is ok to submit.
> 
> 
> Thanks,
> Andrea Di Biagio
> SN Systems - Sony Computer Entertainment Group
> <patch.diff>