[llvm] r197984 - [SystemZ] Add MC support for interlocked-access 1 instructions
Richard Sandiford
rsandifo at linux.vnet.ibm.com
Tue Dec 24 07:14:05 PST 2013
Author: rsandifo
Date: Tue Dec 24 09:14:05 2013
New Revision: 197984
URL: http://llvm.org/viewvc/llvm-project?rev=197984&view=rev
Log:
[SystemZ] Add MC support for interlocked-access 1 instructions
Modified:
llvm/trunk/lib/Target/SystemZ/SystemZInstrFormats.td
llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
llvm/trunk/lib/Target/SystemZ/SystemZProcessors.td
llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp
llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h
llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt
llvm/trunk/test/MC/SystemZ/insn-bad-z196.s
llvm/trunk/test/MC/SystemZ/insn-bad.s
llvm/trunk/test/MC/SystemZ/insn-good-z196.s
Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrFormats.td?rev=197984&r1=197983&r2=197984&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrFormats.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrFormats.td Tue Dec 24 09:14:05 2013
@@ -531,6 +531,10 @@ class InstSS<bits<8> op, dag outs, dag i
// Ternary:
// One register output operand and three register input operands.
//
+// LoadAndOp:
+// One output operand and two input operands. The first input operand
+// is a register and the second is an address.
+//
// CmpSwap:
// One output operand and three input operands. The first two
// operands are registers and the third is an address. The instruction
@@ -1267,6 +1271,15 @@ class TernaryRXF<string mnemonic, bits<1
let AccessBytes = bytes;
}
+class LoadAndOpRSY<string mnemonic, bits<16> opcode, SDPatternOperator operator,
+ RegisterOperand cls, AddressingMode mode = bdaddr20only>
+ : InstRSY<opcode, (outs cls:$R1), (ins cls:$R3, mode:$BD2),
+ mnemonic#"\t$R1, $R3, $BD2",
+ [(set cls:$R1, (operator mode:$BD2, cls:$R3))]> {
+ let mayLoad = 1;
+ let mayStore = 1;
+}
+
class CmpSwapRS<string mnemonic, bits<8> opcode, SDPatternOperator operator,
RegisterOperand cls, AddressingMode mode = bdaddr12only>
: InstRS<opcode, (outs cls:$R1), (ins cls:$R1src, cls:$R3, mode:$BD2),
Modified: llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td?rev=197984&r1=197983&r2=197984&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZInstrInfo.td Tue Dec 24 09:14:05 2013
@@ -1203,6 +1203,19 @@ def PFDRL : PrefetchRILPC<"pfdrl", 0xC62
def Serialize : Alias<2, (outs), (ins), [(z_serialize)]>;
+let Predicates = [FeatureInterlockedAccess1], Defs = [CC] in {
+ def LAA : LoadAndOpRSY<"laa", 0xEBF8, null_frag, GR32>;
+ def LAAG : LoadAndOpRSY<"laag", 0xEBE8, null_frag, GR64>;
+ def LAAL : LoadAndOpRSY<"laal", 0xEBFA, null_frag, GR32>;
+ def LAALG : LoadAndOpRSY<"laalg", 0xEBEA, null_frag, GR64>;
+ def LAN : LoadAndOpRSY<"lan", 0xEBF4, null_frag, GR32>;
+ def LANG : LoadAndOpRSY<"lang", 0xEBE4, null_frag, GR64>;
+ def LAO : LoadAndOpRSY<"lao", 0xEBF6, null_frag, GR32>;
+ def LAOG : LoadAndOpRSY<"laog", 0xEBE6, null_frag, GR64>;
+ def LAX : LoadAndOpRSY<"lax", 0xEBF7, null_frag, GR32>;
+ def LAXG : LoadAndOpRSY<"laxg", 0xEBE7, null_frag, GR64>;
+}
+
def ATOMIC_SWAPW : AtomicLoadWBinaryReg<z_atomic_swapw>;
def ATOMIC_SWAP_32 : AtomicLoadBinaryReg32<atomic_swap_32>;
def ATOMIC_SWAP_64 : AtomicLoadBinaryReg64<atomic_swap_64>;
Modified: llvm/trunk/lib/Target/SystemZ/SystemZProcessors.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZProcessors.td?rev=197984&r1=197983&r2=197984&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZProcessors.td (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZProcessors.td Tue Dec 24 09:14:05 2013
@@ -41,11 +41,18 @@ def FeatureFastSerialization : SystemZFe
"Assume that the fast-serialization facility is installed"
>;
+def FeatureInterlockedAccess1 : SystemZFeature<
+ "interlocked-access1", "InterlockedAccess1",
+ "Assume that interlocked-access facility 1 is installed"
+>;
+
def : Processor<"generic", NoItineraries, []>;
def : Processor<"z10", NoItineraries, []>;
def : Processor<"z196", NoItineraries,
[FeatureDistinctOps, FeatureLoadStoreOnCond, FeatureHighWord,
- FeatureFPExtension, FeatureFastSerialization]>;
+ FeatureFPExtension, FeatureFastSerialization,
+ FeatureInterlockedAccess1]>;
def : Processor<"zEC12", NoItineraries,
[FeatureDistinctOps, FeatureLoadStoreOnCond, FeatureHighWord,
- FeatureFPExtension, FeatureFastSerialization]>;
+ FeatureFPExtension, FeatureFastSerialization,
+ FeatureInterlockedAccess1]>;
Modified: llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp?rev=197984&r1=197983&r2=197984&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.cpp Tue Dec 24 09:14:05 2013
@@ -26,7 +26,8 @@ SystemZSubtarget::SystemZSubtarget(const
const std::string &FS)
: SystemZGenSubtargetInfo(TT, CPU, FS), HasDistinctOps(false),
HasLoadStoreOnCond(false), HasHighWord(false), HasFPExtension(false),
- HasFastSerialization(false), TargetTriple(TT) {
+ HasFastSerialization(false), HasInterlockedAccess1(false),
+ TargetTriple(TT) {
std::string CPUName = CPU;
if (CPUName.empty())
CPUName = "generic";
Modified: llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h?rev=197984&r1=197983&r2=197984&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZSubtarget.h Tue Dec 24 09:14:05 2013
@@ -33,6 +33,7 @@ protected:
bool HasHighWord;
bool HasFPExtension;
bool HasFastSerialization;
+ bool HasInterlockedAccess1;
private:
Triple TargetTriple;
@@ -62,6 +63,9 @@ public:
// Return true if the target has the fast-serialization facility.
bool hasFastSerialization() const { return HasFastSerialization; }
+ // Return true if the target has interlocked-access facility 1.
+ bool hasInterlockedAccess1() const { return HasInterlockedAccess1; }
+
// Return true if GV can be accessed using LARL for reloc model RM
// and code model CM.
bool isPC32DBLSymbol(const GlobalValue *GV, Reloc::Model RM,
Modified: llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt?rev=197984&r1=197983&r2=197984&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt (original)
+++ llvm/trunk/test/MC/Disassembler/SystemZ/insns.txt Tue Dec 24 09:14:05 2013
@@ -2545,6 +2545,336 @@
# CHECK: la %r15, 0
0x41 0xf0 0x00 0x00
+# CHECK: laa %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xf8
+
+# CHECK: laa %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xf8
+
+# CHECK: laa %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xf8
+
+# CHECK: laa %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xf8
+
+# CHECK: laa %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xf8
+
+# CHECK: laa %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xf8
+
+# CHECK: laa %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xf8
+
+# CHECK: laa %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xf8
+
+# CHECK: laa %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xf8
+
+# CHECK: laa %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xf8
+
+# CHECK: laa %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xf8
+
+# CHECK: laag %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xe8
+
+# CHECK: laag %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xe8
+
+# CHECK: laag %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xe8
+
+# CHECK: laag %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xe8
+
+# CHECK: laag %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xe8
+
+# CHECK: laag %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xe8
+
+# CHECK: laag %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xe8
+
+# CHECK: laag %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xe8
+
+# CHECK: laag %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xe8
+
+# CHECK: laag %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xe8
+
+# CHECK: laag %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xe8
+
+# CHECK: laal %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xfa
+
+# CHECK: laal %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xfa
+
+# CHECK: laal %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xfa
+
+# CHECK: laal %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xfa
+
+# CHECK: laal %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xfa
+
+# CHECK: laal %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xfa
+
+# CHECK: laal %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xfa
+
+# CHECK: laal %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xfa
+
+# CHECK: laal %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xfa
+
+# CHECK: laal %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xfa
+
+# CHECK: laal %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xfa
+
+# CHECK: laalg %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xea
+
+# CHECK: laalg %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xea
+
+# CHECK: laalg %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xea
+
+# CHECK: laalg %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xea
+
+# CHECK: laalg %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xea
+
+# CHECK: laalg %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xea
+
+# CHECK: laalg %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xea
+
+# CHECK: laalg %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xea
+
+# CHECK: laalg %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xea
+
+# CHECK: laalg %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xea
+
+# CHECK: laalg %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xea
+
+# CHECK: lan %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xf4
+
+# CHECK: lan %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xf4
+
+# CHECK: lan %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xf4
+
+# CHECK: lan %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xf4
+
+# CHECK: lan %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xf4
+
+# CHECK: lan %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xf4
+
+# CHECK: lan %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xf4
+
+# CHECK: lan %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xf4
+
+# CHECK: lan %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xf4
+
+# CHECK: lan %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xf4
+
+# CHECK: lan %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xf4
+
+# CHECK: csy %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0x14
+
+# CHECK: lang %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xe4
+
+# CHECK: lang %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xe4
+
+# CHECK: lang %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xe4
+
+# CHECK: lang %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xe4
+
+# CHECK: lang %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xe4
+
+# CHECK: lang %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xe4
+
+# CHECK: lang %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xe4
+
+# CHECK: lang %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xe4
+
+# CHECK: lang %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xe4
+
+# CHECK: lang %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xe4
+
+# CHECK: lao %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xf6
+
+# CHECK: lao %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xf6
+
+# CHECK: lao %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xf6
+
+# CHECK: lao %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xf6
+
+# CHECK: lao %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xf6
+
+# CHECK: lao %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xf6
+
+# CHECK: lao %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xf6
+
+# CHECK: lao %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xf6
+
+# CHECK: lao %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xf6
+
+# CHECK: lao %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xf6
+
+# CHECK: lao %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xf6
+
+# CHECK: laog %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xe6
+
+# CHECK: laog %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xe6
+
+# CHECK: laog %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xe6
+
+# CHECK: laog %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xe6
+
+# CHECK: laog %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xe6
+
+# CHECK: laog %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xe6
+
+# CHECK: laog %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xe6
+
+# CHECK: laog %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xe6
+
+# CHECK: laog %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xe6
+
+# CHECK: laog %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xe6
+
+# CHECK: laog %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xe6
+
+# CHECK: lax %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xf7
+
+# CHECK: lax %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xf7
+
+# CHECK: lax %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xf7
+
+# CHECK: lax %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xf7
+
+# CHECK: lax %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xf7
+
+# CHECK: lax %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xf7
+
+# CHECK: lax %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xf7
+
+# CHECK: lax %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xf7
+
+# CHECK: lax %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xf7
+
+# CHECK: lax %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xf7
+
+# CHECK: lax %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xf7
+
+# CHECK: laxg %r0, %r0, -524288
+0xeb 0x00 0x00 0x00 0x80 0xe7
+
+# CHECK: laxg %r0, %r0, -1
+0xeb 0x00 0x0f 0xff 0xff 0xe7
+
+# CHECK: laxg %r0, %r0, 0
+0xeb 0x00 0x00 0x00 0x00 0xe7
+
+# CHECK: laxg %r0, %r0, 1
+0xeb 0x00 0x00 0x01 0x00 0xe7
+
+# CHECK: laxg %r0, %r0, 524287
+0xeb 0x00 0x0f 0xff 0x7f 0xe7
+
+# CHECK: laxg %r0, %r0, 0(%r1)
+0xeb 0x00 0x10 0x00 0x00 0xe7
+
+# CHECK: laxg %r0, %r0, 0(%r15)
+0xeb 0x00 0xf0 0x00 0x00 0xe7
+
+# CHECK: laxg %r0, %r0, 524287(%r1)
+0xeb 0x00 0x1f 0xff 0x7f 0xe7
+
+# CHECK: laxg %r0, %r0, 524287(%r15)
+0xeb 0x00 0xff 0xff 0x7f 0xe7
+
+# CHECK: laxg %r0, %r15, 0
+0xeb 0x0f 0x00 0x00 0x00 0xe7
+
+# CHECK: laxg %r15, %r0, 0
+0xeb 0xf0 0x00 0x00 0x00 0xe7
+
# CHECK: lay %r0, -524288
0xe3 0x00 0x00 0x00 0x80 0x71
Modified: llvm/trunk/test/MC/SystemZ/insn-bad-z196.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/SystemZ/insn-bad-z196.s?rev=197984&r1=197983&r2=197984&view=diff
==============================================================================
--- llvm/trunk/test/MC/SystemZ/insn-bad-z196.s (original)
+++ llvm/trunk/test/MC/SystemZ/insn-bad-z196.s Tue Dec 24 09:14:05 2013
@@ -113,6 +113,116 @@
fixbra %f2, 0, %f0, 0
#CHECK: error: invalid operand
+#CHECK: laa %r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: laa %r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: laa %r0, %r0, 0(%r1,%r2)
+
+ laa %r0, %r0, -524289
+ laa %r0, %r0, 524288
+ laa %r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: laag %r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: laag %r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: laag %r0, %r0, 0(%r1,%r2)
+
+ laag %r0, %r0, -524289
+ laag %r0, %r0, 524288
+ laag %r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: laal %r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: laal %r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: laal %r0, %r0, 0(%r1,%r2)
+
+ laal %r0, %r0, -524289
+ laal %r0, %r0, 524288
+ laal %r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: laalg %r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: laalg %r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: laalg %r0, %r0, 0(%r1,%r2)
+
+ laalg %r0, %r0, -524289
+ laalg %r0, %r0, 524288
+ laalg %r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: lan %r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: lan %r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: lan %r0, %r0, 0(%r1,%r2)
+
+ lan %r0, %r0, -524289
+ lan %r0, %r0, 524288
+ lan %r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: lang %r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: lang %r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: lang %r0, %r0, 0(%r1,%r2)
+
+ lang %r0, %r0, -524289
+ lang %r0, %r0, 524288
+ lang %r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: lao %r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: lao %r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: lao %r0, %r0, 0(%r1,%r2)
+
+ lao %r0, %r0, -524289
+ lao %r0, %r0, 524288
+ lao %r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: laog %r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: laog %r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: laog %r0, %r0, 0(%r1,%r2)
+
+ laog %r0, %r0, -524289
+ laog %r0, %r0, 524288
+ laog %r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: lax %r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: lax %r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: lax %r0, %r0, 0(%r1,%r2)
+
+ lax %r0, %r0, -524289
+ lax %r0, %r0, 524288
+ lax %r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
+#CHECK: laxg %r0, %r0, -524289
+#CHECK: error: invalid operand
+#CHECK: laxg %r0, %r0, 524288
+#CHECK: error: invalid use of indexed addressing
+#CHECK: laxg %r0, %r0, 0(%r1,%r2)
+
+ laxg %r0, %r0, -524289
+ laxg %r0, %r0, 524288
+ laxg %r0, %r0, 0(%r1,%r2)
+
+#CHECK: error: invalid operand
#CHECK: lbh %r0, -524289
#CHECK: error: invalid operand
#CHECK: lbh %r0, 524288
Modified: llvm/trunk/test/MC/SystemZ/insn-bad.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/SystemZ/insn-bad.s?rev=197984&r1=197983&r2=197984&view=diff
==============================================================================
--- llvm/trunk/test/MC/SystemZ/insn-bad.s (original)
+++ llvm/trunk/test/MC/SystemZ/insn-bad.s Tue Dec 24 09:14:05 2013
@@ -1393,6 +1393,46 @@
la %r0, -1
la %r0, 4096
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: laa %r1, %r2, 100(%r3)
+ laa %r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: laag %r1, %r2, 100(%r3)
+ laag %r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: laal %r1, %r2, 100(%r3)
+ laal %r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: laalg %r1, %r2, 100(%r3)
+ laalg %r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: lan %r1, %r2, 100(%r3)
+ lan %r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: lang %r1, %r2, 100(%r3)
+ lang %r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: lao %r1, %r2, 100(%r3)
+ lao %r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: laog %r1, %r2, 100(%r3)
+ laog %r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: lax %r1, %r2, 100(%r3)
+ lax %r1, %r2, 100(%r3)
+
+#CHECK: error: {{(instruction requires: interlocked-access1)?}}
+#CHECK: laxg %r1, %r2, 100(%r3)
+ laxg %r1, %r2, 100(%r3)
+
#CHECK: error: offset out of range
#CHECK: larl %r0, -0x1000000002
#CHECK: error: offset out of range
Modified: llvm/trunk/test/MC/SystemZ/insn-good-z196.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/SystemZ/insn-good-z196.s?rev=197984&r1=197983&r2=197984&view=diff
==============================================================================
--- llvm/trunk/test/MC/SystemZ/insn-good-z196.s (original)
+++ llvm/trunk/test/MC/SystemZ/insn-good-z196.s Tue Dec 24 09:14:05 2013
@@ -245,6 +245,246 @@
fixbra %f4, 5, %f8, 9
fixbra %f13, 0, %f0, 0
+#CHECK: laa %r0, %r0, -524288 # encoding: [0xeb,0x00,0x00,0x00,0x80,0xf8]
+#CHECK: laa %r0, %r0, -1 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xf8]
+#CHECK: laa %r0, %r0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0xf8]
+#CHECK: laa %r0, %r0, 1 # encoding: [0xeb,0x00,0x00,0x01,0x00,0xf8]
+#CHECK: laa %r0, %r0, 524287 # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xf8]
+#CHECK: laa %r0, %r0, 0(%r1) # encoding: [0xeb,0x00,0x10,0x00,0x00,0xf8]
+#CHECK: laa %r0, %r0, 0(%r15) # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xf8]
+#CHECK: laa %r0, %r0, 524287(%r1) # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xf8]
+#CHECK: laa %r0, %r0, 524287(%r15) # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xf8]
+#CHECK: laa %r0, %r15, 0 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xf8]
+#CHECK: laa %r15, %r0, 0 # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xf8]
+
+ laa %r0, %r0, -524288
+ laa %r0, %r0, -1
+ laa %r0, %r0, 0
+ laa %r0, %r0, 1
+ laa %r0, %r0, 524287
+ laa %r0, %r0, 0(%r1)
+ laa %r0, %r0, 0(%r15)
+ laa %r0, %r0, 524287(%r1)
+ laa %r0, %r0, 524287(%r15)
+ laa %r0, %r15, 0
+ laa %r15, %r0, 0
+
+#CHECK: laag %r0, %r0, -524288 # encoding: [0xeb,0x00,0x00,0x00,0x80,0xe8]
+#CHECK: laag %r0, %r0, -1 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xe8]
+#CHECK: laag %r0, %r0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0xe8]
+#CHECK: laag %r0, %r0, 1 # encoding: [0xeb,0x00,0x00,0x01,0x00,0xe8]
+#CHECK: laag %r0, %r0, 524287 # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xe8]
+#CHECK: laag %r0, %r0, 0(%r1) # encoding: [0xeb,0x00,0x10,0x00,0x00,0xe8]
+#CHECK: laag %r0, %r0, 0(%r15) # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xe8]
+#CHECK: laag %r0, %r0, 524287(%r1) # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xe8]
+#CHECK: laag %r0, %r0, 524287(%r15) # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xe8]
+#CHECK: laag %r0, %r15, 0 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xe8]
+#CHECK: laag %r15, %r0, 0 # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xe8]
+
+ laag %r0, %r0, -524288
+ laag %r0, %r0, -1
+ laag %r0, %r0, 0
+ laag %r0, %r0, 1
+ laag %r0, %r0, 524287
+ laag %r0, %r0, 0(%r1)
+ laag %r0, %r0, 0(%r15)
+ laag %r0, %r0, 524287(%r1)
+ laag %r0, %r0, 524287(%r15)
+ laag %r0, %r15, 0
+ laag %r15, %r0, 0
+
+#CHECK: laal %r0, %r0, -524288 # encoding: [0xeb,0x00,0x00,0x00,0x80,0xfa]
+#CHECK: laal %r0, %r0, -1 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xfa]
+#CHECK: laal %r0, %r0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0xfa]
+#CHECK: laal %r0, %r0, 1 # encoding: [0xeb,0x00,0x00,0x01,0x00,0xfa]
+#CHECK: laal %r0, %r0, 524287 # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xfa]
+#CHECK: laal %r0, %r0, 0(%r1) # encoding: [0xeb,0x00,0x10,0x00,0x00,0xfa]
+#CHECK: laal %r0, %r0, 0(%r15) # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xfa]
+#CHECK: laal %r0, %r0, 524287(%r1) # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xfa]
+#CHECK: laal %r0, %r0, 524287(%r15) # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xfa]
+#CHECK: laal %r0, %r15, 0 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xfa]
+#CHECK: laal %r15, %r0, 0 # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xfa]
+
+ laal %r0, %r0, -524288
+ laal %r0, %r0, -1
+ laal %r0, %r0, 0
+ laal %r0, %r0, 1
+ laal %r0, %r0, 524287
+ laal %r0, %r0, 0(%r1)
+ laal %r0, %r0, 0(%r15)
+ laal %r0, %r0, 524287(%r1)
+ laal %r0, %r0, 524287(%r15)
+ laal %r0, %r15, 0
+ laal %r15, %r0, 0
+
+#CHECK: laalg %r0, %r0, -524288 # encoding: [0xeb,0x00,0x00,0x00,0x80,0xea]
+#CHECK: laalg %r0, %r0, -1 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xea]
+#CHECK: laalg %r0, %r0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0xea]
+#CHECK: laalg %r0, %r0, 1 # encoding: [0xeb,0x00,0x00,0x01,0x00,0xea]
+#CHECK: laalg %r0, %r0, 524287 # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xea]
+#CHECK: laalg %r0, %r0, 0(%r1) # encoding: [0xeb,0x00,0x10,0x00,0x00,0xea]
+#CHECK: laalg %r0, %r0, 0(%r15) # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xea]
+#CHECK: laalg %r0, %r0, 524287(%r1) # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xea]
+#CHECK: laalg %r0, %r0, 524287(%r15) # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xea]
+#CHECK: laalg %r0, %r15, 0 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xea]
+#CHECK: laalg %r15, %r0, 0 # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xea]
+
+ laalg %r0, %r0, -524288
+ laalg %r0, %r0, -1
+ laalg %r0, %r0, 0
+ laalg %r0, %r0, 1
+ laalg %r0, %r0, 524287
+ laalg %r0, %r0, 0(%r1)
+ laalg %r0, %r0, 0(%r15)
+ laalg %r0, %r0, 524287(%r1)
+ laalg %r0, %r0, 524287(%r15)
+ laalg %r0, %r15, 0
+ laalg %r15, %r0, 0
+
+#CHECK: lan %r0, %r0, -524288 # encoding: [0xeb,0x00,0x00,0x00,0x80,0xf4]
+#CHECK: lan %r0, %r0, -1 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xf4]
+#CHECK: lan %r0, %r0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0xf4]
+#CHECK: lan %r0, %r0, 1 # encoding: [0xeb,0x00,0x00,0x01,0x00,0xf4]
+#CHECK: lan %r0, %r0, 524287 # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xf4]
+#CHECK: lan %r0, %r0, 0(%r1) # encoding: [0xeb,0x00,0x10,0x00,0x00,0xf4]
+#CHECK: lan %r0, %r0, 0(%r15) # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xf4]
+#CHECK: lan %r0, %r0, 524287(%r1) # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xf4]
+#CHECK: lan %r0, %r0, 524287(%r15) # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xf4]
+#CHECK: lan %r0, %r15, 0 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xf4]
+#CHECK: lan %r15, %r0, 0 # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xf4]
+
+ lan %r0, %r0, -524288
+ lan %r0, %r0, -1
+ lan %r0, %r0, 0
+ lan %r0, %r0, 1
+ lan %r0, %r0, 524287
+ lan %r0, %r0, 0(%r1)
+ lan %r0, %r0, 0(%r15)
+ lan %r0, %r0, 524287(%r1)
+ lan %r0, %r0, 524287(%r15)
+ lan %r0, %r15, 0
+ lan %r15, %r0, 0
+
+#CHECK: lang %r0, %r0, -524288 # encoding: [0xeb,0x00,0x00,0x00,0x80,0xe4]
+#CHECK: lang %r0, %r0, -1 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xe4]
+#CHECK: lang %r0, %r0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0xe4]
+#CHECK: lang %r0, %r0, 1 # encoding: [0xeb,0x00,0x00,0x01,0x00,0xe4]
+#CHECK: lang %r0, %r0, 524287 # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xe4]
+#CHECK: lang %r0, %r0, 0(%r1) # encoding: [0xeb,0x00,0x10,0x00,0x00,0xe4]
+#CHECK: lang %r0, %r0, 0(%r15) # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xe4]
+#CHECK: lang %r0, %r0, 524287(%r1) # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xe4]
+#CHECK: lang %r0, %r0, 524287(%r15) # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xe4]
+#CHECK: lang %r0, %r15, 0 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xe4]
+#CHECK: lang %r15, %r0, 0 # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xe4]
+
+ lang %r0, %r0, -524288
+ lang %r0, %r0, -1
+ lang %r0, %r0, 0
+ lang %r0, %r0, 1
+ lang %r0, %r0, 524287
+ lang %r0, %r0, 0(%r1)
+ lang %r0, %r0, 0(%r15)
+ lang %r0, %r0, 524287(%r1)
+ lang %r0, %r0, 524287(%r15)
+ lang %r0, %r15, 0
+ lang %r15, %r0, 0
+
+#CHECK: lao %r0, %r0, -524288 # encoding: [0xeb,0x00,0x00,0x00,0x80,0xf6]
+#CHECK: lao %r0, %r0, -1 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xf6]
+#CHECK: lao %r0, %r0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0xf6]
+#CHECK: lao %r0, %r0, 1 # encoding: [0xeb,0x00,0x00,0x01,0x00,0xf6]
+#CHECK: lao %r0, %r0, 524287 # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xf6]
+#CHECK: lao %r0, %r0, 0(%r1) # encoding: [0xeb,0x00,0x10,0x00,0x00,0xf6]
+#CHECK: lao %r0, %r0, 0(%r15) # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xf6]
+#CHECK: lao %r0, %r0, 524287(%r1) # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xf6]
+#CHECK: lao %r0, %r0, 524287(%r15) # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xf6]
+#CHECK: lao %r0, %r15, 0 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xf6]
+#CHECK: lao %r15, %r0, 0 # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xf6]
+
+ lao %r0, %r0, -524288
+ lao %r0, %r0, -1
+ lao %r0, %r0, 0
+ lao %r0, %r0, 1
+ lao %r0, %r0, 524287
+ lao %r0, %r0, 0(%r1)
+ lao %r0, %r0, 0(%r15)
+ lao %r0, %r0, 524287(%r1)
+ lao %r0, %r0, 524287(%r15)
+ lao %r0, %r15, 0
+ lao %r15, %r0, 0
+
+#CHECK: laog %r0, %r0, -524288 # encoding: [0xeb,0x00,0x00,0x00,0x80,0xe6]
+#CHECK: laog %r0, %r0, -1 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xe6]
+#CHECK: laog %r0, %r0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0xe6]
+#CHECK: laog %r0, %r0, 1 # encoding: [0xeb,0x00,0x00,0x01,0x00,0xe6]
+#CHECK: laog %r0, %r0, 524287 # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xe6]
+#CHECK: laog %r0, %r0, 0(%r1) # encoding: [0xeb,0x00,0x10,0x00,0x00,0xe6]
+#CHECK: laog %r0, %r0, 0(%r15) # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xe6]
+#CHECK: laog %r0, %r0, 524287(%r1) # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xe6]
+#CHECK: laog %r0, %r0, 524287(%r15) # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xe6]
+#CHECK: laog %r0, %r15, 0 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xe6]
+#CHECK: laog %r15, %r0, 0 # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xe6]
+
+ laog %r0, %r0, -524288
+ laog %r0, %r0, -1
+ laog %r0, %r0, 0
+ laog %r0, %r0, 1
+ laog %r0, %r0, 524287
+ laog %r0, %r0, 0(%r1)
+ laog %r0, %r0, 0(%r15)
+ laog %r0, %r0, 524287(%r1)
+ laog %r0, %r0, 524287(%r15)
+ laog %r0, %r15, 0
+ laog %r15, %r0, 0
+
+#CHECK: lax %r0, %r0, -524288 # encoding: [0xeb,0x00,0x00,0x00,0x80,0xf7]
+#CHECK: lax %r0, %r0, -1 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xf7]
+#CHECK: lax %r0, %r0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0xf7]
+#CHECK: lax %r0, %r0, 1 # encoding: [0xeb,0x00,0x00,0x01,0x00,0xf7]
+#CHECK: lax %r0, %r0, 524287 # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xf7]
+#CHECK: lax %r0, %r0, 0(%r1) # encoding: [0xeb,0x00,0x10,0x00,0x00,0xf7]
+#CHECK: lax %r0, %r0, 0(%r15) # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xf7]
+#CHECK: lax %r0, %r0, 524287(%r1) # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xf7]
+#CHECK: lax %r0, %r0, 524287(%r15) # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xf7]
+#CHECK: lax %r0, %r15, 0 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xf7]
+#CHECK: lax %r15, %r0, 0 # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xf7]
+
+ lax %r0, %r0, -524288
+ lax %r0, %r0, -1
+ lax %r0, %r0, 0
+ lax %r0, %r0, 1
+ lax %r0, %r0, 524287
+ lax %r0, %r0, 0(%r1)
+ lax %r0, %r0, 0(%r15)
+ lax %r0, %r0, 524287(%r1)
+ lax %r0, %r0, 524287(%r15)
+ lax %r0, %r15, 0
+ lax %r15, %r0, 0
+
+#CHECK: laxg %r0, %r0, -524288 # encoding: [0xeb,0x00,0x00,0x00,0x80,0xe7]
+#CHECK: laxg %r0, %r0, -1 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0xe7]
+#CHECK: laxg %r0, %r0, 0 # encoding: [0xeb,0x00,0x00,0x00,0x00,0xe7]
+#CHECK: laxg %r0, %r0, 1 # encoding: [0xeb,0x00,0x00,0x01,0x00,0xe7]
+#CHECK: laxg %r0, %r0, 524287 # encoding: [0xeb,0x00,0x0f,0xff,0x7f,0xe7]
+#CHECK: laxg %r0, %r0, 0(%r1) # encoding: [0xeb,0x00,0x10,0x00,0x00,0xe7]
+#CHECK: laxg %r0, %r0, 0(%r15) # encoding: [0xeb,0x00,0xf0,0x00,0x00,0xe7]
+#CHECK: laxg %r0, %r0, 524287(%r1) # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0xe7]
+#CHECK: laxg %r0, %r0, 524287(%r15) # encoding: [0xeb,0x00,0xff,0xff,0x7f,0xe7]
+#CHECK: laxg %r0, %r15, 0 # encoding: [0xeb,0x0f,0x00,0x00,0x00,0xe7]
+#CHECK: laxg %r15, %r0, 0 # encoding: [0xeb,0xf0,0x00,0x00,0x00,0xe7]
+
+ laxg %r0, %r0, -524288
+ laxg %r0, %r0, -1
+ laxg %r0, %r0, 0
+ laxg %r0, %r0, 1
+ laxg %r0, %r0, 524287
+ laxg %r0, %r0, 0(%r1)
+ laxg %r0, %r0, 0(%r15)
+ laxg %r0, %r0, 524287(%r1)
+ laxg %r0, %r0, 524287(%r15)
+ laxg %r0, %r15, 0
+ laxg %r15, %r0, 0
+
#CHECK: lbh %r0, -524288 # encoding: [0xe3,0x00,0x00,0x00,0x80,0xc0]
#CHECK: lbh %r0, -1 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0xc0]
#CHECK: lbh %r0, 0 # encoding: [0xe3,0x00,0x00,0x00,0x00,0xc0]
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