[PATCH v3 11/11] [x86] Fix MOV8ao8 et al for 16-bit mode
David Woodhouse
dwmw2 at infradead.org
Fri Dec 20 06:58:08 PST 2013
From: David Woodhouse <David.Woodhouse at intel.com>
GAS would actually let us choose between these with an explicit addr32
prefix. Another viable alternative here would be just to make them 32-bit
only, and use the less optimal encodings for AH/AX/EAX accesses instead.
But let's see who screams at me for the isAsmParserOnly=1 version...
---
lib/Target/X86/X86InstrInfo.td | 38 +++++++++++++++++++++++++++++++-------
test/MC/X86/x86-16.s | 11 +++++++++++
2 files changed, 42 insertions(+), 7 deletions(-)
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 78da7d2..502ac31 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -1133,29 +1133,53 @@ def MOV64mi32 : RIi32<0xC7, MRM0m, (outs), (ins i64mem:$dst, i64i32imm:$src),
let hasSideEffects = 0 in {
/// moffs8, moffs16 and moffs32 versions of moves. The immediate is a
-/// 32-bit offset from the PC. These are only valid in x86-32 mode.
+/// 32-bit offset from the segment base. These are only valid in x86-32 mode.
let SchedRW = [WriteALU] in {
let mayLoad = 1 in {
def MOV8o8a : Ii32 <0xA0, RawFrm, (outs), (ins offset8:$src),
"mov{b}\t{$src, %al|al, $src}", [], IIC_MOV_MEM>,
- Requires<[Not64BitMode]>;
+ Requires<[In32BitMode]>;
def MOV16o16a : Ii32 <0xA1, RawFrm, (outs), (ins offset16:$src),
"mov{w}\t{$src, %ax|ax, $src}", [], IIC_MOV_MEM>, OpSize,
- Requires<[Not64BitMode]>;
+ Requires<[In32BitMode]>;
def MOV32o32a : Ii32 <0xA1, RawFrm, (outs), (ins offset32:$src),
"mov{l}\t{$src, %eax|eax, $src}", [], IIC_MOV_MEM>,
- OpSize16, Requires<[Not64BitMode]>;
+ OpSize16, Requires<[In32BitMode]>;
+
+let isAsmParserOnly = 1 in {
+def MOV8o8a_16 : Ii16 <0xA0, RawFrm, (outs), (ins offset8:$src),
+ "mov{b}\t{$src, %al|al, $src}", [], IIC_MOV_MEM>,
+ Requires<[In16BitMode]>;
+def MOV16o16a_16 : Ii16 <0xA1, RawFrm, (outs), (ins offset16:$src),
+ "mov{w}\t{$src, %ax|ax, $src}", [], IIC_MOV_MEM>, OpSize,
+ Requires<[In16BitMode]>;
+def MOV32o32a_16 : Ii16 <0xA1, RawFrm, (outs), (ins offset32:$src),
+ "mov{l}\t{$src, %eax|eax, $src}", [], IIC_MOV_MEM>,
+ OpSize16, Requires<[In16BitMode]>;
+}
}
let mayStore = 1 in {
def MOV8ao8 : Ii32 <0xA2, RawFrm, (outs offset8:$dst), (ins),
"mov{b}\t{%al, $dst|$dst, al}", [], IIC_MOV_MEM>,
- Requires<[Not64BitMode]>;
+ Requires<[In32BitMode]>;
def MOV16ao16 : Ii32 <0xA3, RawFrm, (outs offset16:$dst), (ins),
"mov{w}\t{%ax, $dst|$dst, ax}", [], IIC_MOV_MEM>, OpSize,
- Requires<[Not64BitMode]>;
+ Requires<[In32BitMode]>;
def MOV32ao32 : Ii32 <0xA3, RawFrm, (outs offset32:$dst), (ins),
"mov{l}\t{%eax, $dst|$dst, eax}", [], IIC_MOV_MEM>,
- OpSize16, Requires<[Not64BitMode]>;
+ OpSize16, Requires<[In32BitMode]>;
+
+let isAsmParserOnly = 1 in {
+def MOV8ao8_16 : Ii16 <0xA2, RawFrm, (outs offset8:$dst), (ins),
+ "mov{b}\t{%al, $dst|$dst, al}", [], IIC_MOV_MEM>,
+ Requires<[In16BitMode]>;
+def MOV16ao16_16 : Ii16 <0xA3, RawFrm, (outs offset16:$dst), (ins),
+ "mov{w}\t{%ax, $dst|$dst, ax}", [], IIC_MOV_MEM>, OpSize,
+ Requires<[In16BitMode]>;
+def MOV32ao32_16 : Ii16 <0xA3, RawFrm, (outs offset32:$dst), (ins),
+ "mov{l}\t{%eax, $dst|$dst, eax}", [], IIC_MOV_MEM>,
+ OpSize16, Requires<[In16BitMode]>;
+}
}
}
diff --git a/test/MC/X86/x86-16.s b/test/MC/X86/x86-16.s
index 4f2108c..1910f46 100644
--- a/test/MC/X86/x86-16.s
+++ b/test/MC/X86/x86-16.s
@@ -49,6 +49,17 @@
// CHECK: shll %eax # encoding: [0x66,0xd1,0xe0]
sal $1, %eax
+// moffset forms of moves
+
+// CHECK: movb 0, %al # encoding: [0xa0,0x00,0x00]
+movb 0, %al
+
+// CHECK: movw 0, %ax # encoding: [0xa1,0x00,0x00]
+movw 0, %ax
+
+// CHECK: movl 0, %eax # encoding: [0x66,0xa1,0x00,0x00]
+movl 0, %eax
+
into
// CHECK: into
// CHECK: encoding: [0xce]
--
1.8.3.1
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