[llvm] r197783 - R600: Allow ftrunc

[Tom Stellard]

Author: tstellar
Date: Thu Dec 19 23:11:55 2013
New Revision: 197783

URL: http://llvm.org/viewvc/llvm-project?rev=197783&view=rev
Log:
R600: Allow ftrunc

v2: Add ftrunc->TRUNC pattern instead of replacing int_AMDGPU_trunc
v3: move ftrunc pattern next to TRUNC definition, it's available since R600

Patch By: Jan Vesely

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
Signed-off-by: Jan Vesely <jan.vesely at rutgers.edu>

Added:
    llvm/trunk/test/CodeGen/R600/llvm.trunc.ll
Modified:
    llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp
    llvm/trunk/lib/Target/R600/R600Instructions.td

Modified: llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp?rev=197783&r1=197782&r2=197783&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUISelLowering.cpp Thu Dec 19 23:11:55 2013
@@ -60,6 +60,7 @@ AMDGPUTargetLowering::AMDGPUTargetLoweri
   setOperationAction(ISD::FFLOOR, MVT::f32, Legal);
   setOperationAction(ISD::FRINT,  MVT::f32, Legal);
   setOperationAction(ISD::FROUND, MVT::f32, Legal);
+  setOperationAction(ISD::FTRUNC, MVT::f32, Legal);
 
   // The hardware supports ROTR, but not ROTL
   setOperationAction(ISD::ROTL, MVT::i32, Expand);
@@ -184,6 +185,7 @@ AMDGPUTargetLowering::AMDGPUTargetLoweri
     setOperationAction(ISD::FADD, VT, Expand);
     setOperationAction(ISD::FDIV, VT, Expand);
     setOperationAction(ISD::FFLOOR, VT, Expand);
+    setOperationAction(ISD::FTRUNC, VT, Expand);
     setOperationAction(ISD::FMUL, VT, Expand);
     setOperationAction(ISD::FRINT, VT, Expand);
     setOperationAction(ISD::FSQRT, VT, Expand);

Modified: llvm/trunk/lib/Target/R600/R600Instructions.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/R600Instructions.td?rev=197783&r1=197782&r2=197783&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/R600Instructions.td (original)
+++ llvm/trunk/lib/Target/R600/R600Instructions.td Thu Dec 19 23:11:55 2013
@@ -733,6 +733,9 @@ def CEIL : R600_1OP_Helper <0x12, "CEIL"
 def RNDNE : R600_1OP_Helper <0x13, "RNDNE", frint>;
 def FLOOR : R600_1OP_Helper <0x14, "FLOOR", ffloor>;
 
+// Add also ftrunc intrinsic pattern
+def : Pat<(ftrunc f32:$src0), (TRUNC $src0)>;
+
 def MOV : R600_1OP <0x19, "MOV", []>;
 
 let isPseudo = 1, isCodeGenOnly = 1, usesCustomInserter = 1 in {

Added: llvm/trunk/test/CodeGen/R600/llvm.trunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.trunc.ll?rev=197783&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.trunc.ll (added)
+++ llvm/trunk/test/CodeGen/R600/llvm.trunc.ll Thu Dec 19 23:11:55 2013
@@ -0,0 +1,13 @@
+; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
+
+; CHECK-LABEL: @trunc_f32
+; CHECK: TRUNC
+
+define void @trunc_f32(float addrspace(1)* %out, float %in) {
+entry:
+  %0 = call float @llvm.trunc.f32(float %in)
+  store float %0, float  addrspace(1)* %out
+  ret void
+}
+
+declare float @llvm.trunc.f32(float)