[PATCH][AARCH64] Fixed fused multiply add/sub patterns

[Ana Pazos]

Hello Tim and reviewers,

 

1)      Bug issue: fnmadd and fnmsub patterns are switched in the current
code in AArch64InstInfo.td

 

-   fnmadd is (-Ra) + (-Rn)*Rm  which should be matched as:

        

                fma (fneg node:$Rn),  node:$Rm, (fneg node:$Ra) and as

 

                (f32 (fsub (f32 (fneg FPR32:$Ra)), (f32 (fmul_su FPR32:$Rn,
FPR32:$Rm))))

 

-   fnmsub is (-Ra) + Rn*Rm which should be matched as 

 

     fma node:$Rn,  node:$Rm, (fneg node:$Ra) and as

 

                (f32 (fsub (f32 (fmul_su FPR32:$Rn, FPR32:$Rm)),
FPR32:$Ra))))

 

 

2)      Performance issue: In the current code we allow matching patterns
like (fadd(fmul)) to create fused multiply add/sub instructions.

In ARM we saw that this caused the multiply operation to be repeated many
times which affected performance.

So in ARM the pattern is only matched if fmul has a single use.

AArch64 targets most probably have one MAC pipe and this will be a
performance issue as well.

 

Let me know if you agree with both changes.

 

Thanks,

Ana.

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