[PATCH][AVX-512] Added AVX-512 support to disassembler.

[Bader, Aleksey A]

Hi,

Attached patch introduces AVX-512 support to disassembler.
It enables basic functionality:

-          Mask and EVEX encoded instructions

-          32 vector register operands, mask operands, memory operands, immediate

-          Writemasks, zeroing-masks

AVX-512 support is still under developments, so some features are missing (not only in disassembler):

-          Memory operand with broadcast. Some instructions were added, but AsmParser doesn't recognize it. Will be fixed by separate patch.

-          {er} (embedded rounding control) and {sae} (suppress all exceptions)

Thanks,
Alexey

--------------------------------------------------------------------
Closed Joint Stock Company Intel A/O
Registered legal address: Krylatsky Hills Business Park, 
17 Krylatskaya Str., Bldg 4, Moscow 121614, 
Russian Federation

This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20131218/5f9e557e/attachment.html>
-------------- next part --------------
A non-text attachment was scrubbed...
Name: avx-512.disasm.v2.diff
Type: application/octet-stream
Size: 55032 bytes
Desc: avx-512.disasm.v2.diff
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20131218/5f9e557e/attachment.obj>