[llvm] r197555 - ARM: force soft-float ABI for tests depending on it.
Tim Northover
tnorthover at apple.com
Wed Dec 18 01:58:07 PST 2013
Author: tnorthover
Date: Wed Dec 18 03:58:06 2013
New Revision: 197555
URL: http://llvm.org/viewvc/llvm-project?rev=197555&view=rev
Log:
ARM: force soft-float ABI for tests depending on it.
This should fix the ARM bots.
Modified:
llvm/trunk/test/CodeGen/ARM/2011-11-29-128bitArithmetics.ll
llvm/trunk/test/CodeGen/ARM/fp.ll
llvm/trunk/test/CodeGen/ARM/fpmem.ll
llvm/trunk/test/CodeGen/ARM/inlineasm3.ll
llvm/trunk/test/CodeGen/ARM/neon_ld1.ll
llvm/trunk/test/CodeGen/ARM/neon_ld2.ll
llvm/trunk/test/CodeGen/ARM/vcombine.ll
llvm/trunk/test/CodeGen/ARM/vdup.ll
llvm/trunk/test/CodeGen/ARM/vld1.ll
llvm/trunk/test/CodeGen/ARM/vlddup.ll
llvm/trunk/test/CodeGen/ARM/vldlane.ll
Modified: llvm/trunk/test/CodeGen/ARM/2011-11-29-128bitArithmetics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2011-11-29-128bitArithmetics.ll?rev=197555&r1=197554&r2=197555&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2011-11-29-128bitArithmetics.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/2011-11-29-128bitArithmetics.ll Wed Dec 18 03:58:06 2013
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s
+; RUN: llc < %s -march=arm -float-abi=soft -mcpu=cortex-a9 | FileCheck %s
@A = global <4 x float> <float 0., float 1., float 2., float 3.>
Modified: llvm/trunk/test/CodeGen/ARM/fp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fp.ll?rev=197555&r1=197554&r2=197555&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fp.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/fp.ll Wed Dec 18 03:58:06 2013
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
+; RUN: llc < %s -march=arm -float-abi=soft -mattr=+vfp2 | FileCheck %s
define float @f(i32 %a) {
;CHECK-LABEL: f:
Modified: llvm/trunk/test/CodeGen/ARM/fpmem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/fpmem.ll?rev=197555&r1=197554&r2=197555&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/fpmem.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/fpmem.ll Wed Dec 18 03:58:06 2013
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
+; RUN: llc < %s -march=arm -float-abi=soft -mattr=+vfp2 | FileCheck %s
define float @f1(float %a) {
; CHECK-LABEL: f1:
Modified: llvm/trunk/test/CodeGen/ARM/inlineasm3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/inlineasm3.ll?rev=197555&r1=197554&r2=197555&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/inlineasm3.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/inlineasm3.ll Wed Dec 18 03:58:06 2013
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mattr=+neon,+v6t2 | FileCheck %s
+; RUN: llc < %s -march=arm -float-abi=soft -mattr=+neon,+v6t2 | FileCheck %s
; Radar 7449043
%struct.int32x4_t = type { <4 x i32> }
Modified: llvm/trunk/test/CodeGen/ARM/neon_ld1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/neon_ld1.ll?rev=197555&r1=197554&r2=197555&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/neon_ld1.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/neon_ld1.ll Wed Dec 18 03:58:06 2013
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+; RUN: llc < %s -march=arm -float-abi=soft -mattr=+neon | FileCheck %s
; CHECK: t1
; CHECK: vldr d
Modified: llvm/trunk/test/CodeGen/ARM/neon_ld2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/neon_ld2.ll?rev=197555&r1=197554&r2=197555&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/neon_ld2.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/neon_ld2.ll Wed Dec 18 03:58:06 2013
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
-; RUN: llc < %s -march=arm -mcpu=swift | FileCheck %s --check-prefix=SWIFT
+; RUN: llc < %s -march=arm -float-abi=soft -mattr=+neon | FileCheck %s
+; RUN: llc < %s -march=arm -float-abi=soft -mcpu=swift | FileCheck %s --check-prefix=SWIFT
; CHECK: t1
; CHECK: vld1.64
Modified: llvm/trunk/test/CodeGen/ARM/vcombine.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vcombine.ll?rev=197555&r1=197554&r2=197555&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vcombine.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vcombine.ll Wed Dec 18 03:58:06 2013
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+; RUN: llc < %s -march=arm -float-abi=soft -mattr=+neon | FileCheck %s
define <16 x i8> @vcombine8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
; CHECK: vcombine8
Modified: llvm/trunk/test/CodeGen/ARM/vdup.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vdup.ll?rev=197555&r1=197554&r2=197555&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vdup.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vdup.ll Wed Dec 18 03:58:06 2013
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+; RUN: llc < %s -march=arm -float-abi=soft -mattr=+neon | FileCheck %s
define <8 x i8> @v_dup8(i8 %A) nounwind {
;CHECK-LABEL: v_dup8:
Modified: llvm/trunk/test/CodeGen/ARM/vld1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vld1.ll?rev=197555&r1=197554&r2=197555&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vld1.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vld1.ll Wed Dec 18 03:58:06 2013
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
-; RUN: llc < %s -march=arm -mattr=+neon -regalloc=basic | FileCheck %s
+; RUN: llc < %s -march=arm -float-abi=soft -mattr=+neon | FileCheck %s
+; RUN: llc < %s -march=arm -float-abi=soft -mattr=+neon -regalloc=basic | FileCheck %s
define <8 x i8> @vld1i8(i8* %A) nounwind {
;CHECK-LABEL: vld1i8:
Modified: llvm/trunk/test/CodeGen/ARM/vlddup.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vlddup.ll?rev=197555&r1=197554&r2=197555&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vlddup.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vlddup.ll Wed Dec 18 03:58:06 2013
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
+; RUN: llc < %s -march=arm -float-abi=soft -mattr=+neon | FileCheck %s
define <8 x i8> @vld1dupi8(i8* %A) nounwind {
;CHECK-LABEL: vld1dupi8:
Modified: llvm/trunk/test/CodeGen/ARM/vldlane.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/vldlane.ll?rev=197555&r1=197554&r2=197555&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/vldlane.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/vldlane.ll Wed Dec 18 03:58:06 2013
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s
-; RUN: llc < %s -march=arm -mattr=+neon -regalloc=basic | FileCheck %s
+; RUN: llc < %s -march=arm -float-abi=soft -mattr=+neon | FileCheck %s
+; RUN: llc < %s -march=arm -float-abi=soft -mattr=+neon -regalloc=basic | FileCheck %s
define <8 x i8> @vld1lanei8(i8* %A, <8 x i8>* %B) nounwind {
;CHECK-LABEL: vld1lanei8:
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