[llvm] r197397 - On DataLayout, omit the default of p:64:64:64.

Rafael Espindola rafael.espindola at gmail.com
Mon Dec 16 09:15:30 PST 2013


Author: rafael
Date: Mon Dec 16 11:15:29 2013
New Revision: 197397

URL: http://llvm.org/viewvc/llvm-project?rev=197397&view=rev
Log:
On DataLayout, omit the default of p:64:64:64.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp
    llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp
    llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp
    llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp
    llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp
    llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp
    llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp
    llvm/trunk/lib/Target/X86/X86TargetMachine.cpp

Modified: llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp?rev=197397&r1=197396&r2=197397&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64TargetMachine.cpp Mon Dec 16 11:15:29 2013
@@ -34,7 +34,7 @@ AArch64TargetMachine::AArch64TargetMachi
   : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
     Subtarget(TT, CPU, FS),
     InstrInfo(Subtarget),
-    DL("e-p:64:64-i64:64:64-i128:128:128-s:32:32-n32:64-S128"),
+    DL("e-i64:64:64-i128:128:128-s:32:32-n32:64-S128"),
     TLInfo(*this),
     TSInfo(*this),
     FrameLowering(Subtarget) {

Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp?rev=197397&r1=197396&r2=197397&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp Mon Dec 16 11:15:29 2013
@@ -54,10 +54,8 @@ static std::string computeDataLayout(con
   else
     Ret += "E";
 
-  // Pointers are 64 or 32 bit depending on the ABI.
-  if (ST.isABI_N64())
-    Ret += "-p:64:64:64";
-  else
+  // Pointers are 32 bit on some ABIs.
+  if (!ST.isABI_N64())
     Ret += "-p:32:32:32";
 
   // 8 and 16 bit integers only need no have natural alignment, but try to

Modified: llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp?rev=197397&r1=197396&r2=197397&view=diff
==============================================================================
--- llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/NVPTX/NVPTXTargetMachine.cpp Mon Dec 16 11:15:29 2013
@@ -66,9 +66,7 @@ extern "C" void LLVMInitializeNVPTXTarge
 static std::string computeDataLayout(const NVPTXSubtarget &ST) {
   std::string Ret = "e";
 
-  if (ST.is64Bit())
-    Ret += "-p:64:64:64";
-  else
+  if (!ST.is64Bit())
     Ret += "-p:32:32:32";
 
   Ret += "-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"

Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp?rev=197397&r1=197396&r2=197397&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp Mon Dec 16 11:15:29 2013
@@ -38,10 +38,8 @@ static std::string getDataLayoutString(c
   // PPC is big endian.
   std::string Ret = "E";
 
-  // PPC64 has 64 bit pointers, PPC32 has 32 bit pointers.
-  if (ST.isPPC64())
-    Ret += "-p:64:64";
-  else
+  // PPC32 has 32 bit pointers.
+  if (!ST.isPPC64())
     Ret += "-p:32:32";
 
   // Note, the alignment values for f64 and i64 on ppc64 in Darwin

Modified: llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp?rev=197397&r1=197396&r2=197397&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUTargetMachine.cpp Mon Dec 16 11:15:29 2013
@@ -61,9 +61,7 @@ static std::string computeDataLayout(con
   if (ST.hasHWFP64())
     DataLayout.append("-f64:64:64");
 
-  if (ST.is64bit())
-    DataLayout.append("-p:64:64:64");
-  else
+  if (!ST.is64bit())
     DataLayout.append("-p:32:32:32");
 
   if (ST.getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS)

Modified: llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp?rev=197397&r1=197396&r2=197397&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp Mon Dec 16 11:15:29 2013
@@ -27,10 +27,8 @@ static std::string computeDataLayout(con
   // Sparc is big endian.
   std::string Ret = "E";
 
-  // V9 has 64 bit pointers, others have 32bit pointers.
-  if (ST.is64Bit())
-    Ret += "-p:64:64:64";
-  else
+  // Some ABIs have 32bit pointers.
+  if (!ST.is64Bit())
     Ret += "-p:32:32:32";
 
   // Alignments for 64 bit integers.

Modified: llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp?rev=197397&r1=197396&r2=197397&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/SystemZTargetMachine.cpp Mon Dec 16 11:15:29 2013
@@ -30,7 +30,7 @@ SystemZTargetMachine::SystemZTargetMachi
     // Make sure that global data has at least 16 bits of alignment by default,
     // so that we can refer to it using LARL.  We don't have any special
     // requirements for stack variables though.
-    DL("E-p:64:64:64-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"),
+    DL("E-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"),
     InstrInfo(*this), TLInfo(*this), TSInfo(*this),
     FrameLowering(*this, Subtarget) {
   initAsmInfo();

Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=197397&r1=197396&r2=197397&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Mon Dec 16 11:15:29 2013
@@ -34,11 +34,9 @@ static std::string computeDataLayout(con
   // X86 is little endian
   std::string Ret = "e";
 
-  // X86 and x32 have 32 bit pointers, x86-64 has 64 bit pointers
+  // X86 and x32 have 32 bit pointers.
   if (ST.isTarget64BitILP32() || !ST.is64Bit())
     Ret += "-p:32:32";
-  else
-    Ret += "-p:64:64";
 
   // Objects on the stack ore aligned to 64 bits.
   // FIXME: of any size?





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