[llvm] r197350 - Last change for mips16 prolog/epilog cleanup and optimization.
Reed Kotler
rkotler at mips.com
Sun Dec 15 12:49:31 PST 2013
Author: rkotler
Date: Sun Dec 15 14:49:30 2013
New Revision: 197350
URL: http://llvm.org/viewvc/llvm-project?rev=197350&view=rev
Log:
Last change for mips16 prolog/epilog cleanup and optimization.
Some tiny cosmetic code changes to follow. Because of the wide
ranging nature of the patch a full 24 test cycle was needed to
check against regression. This was the smallest patch I could
make to progress from the earlier ones in the series.
Removed:
llvm/trunk/test/CodeGen/Mips/largefr1.ll
Modified:
llvm/trunk/lib/Target/Mips/Mips16FrameLowering.cpp
llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp
llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td
llvm/trunk/lib/Target/Mips/MipsCallingConv.td
llvm/trunk/test/CodeGen/Mips/align16.ll
llvm/trunk/test/CodeGen/Mips/alloca16.ll
llvm/trunk/test/CodeGen/Mips/ex2.ll
llvm/trunk/test/CodeGen/Mips/fp16mix.ll
llvm/trunk/test/CodeGen/Mips/helloworld.ll
llvm/trunk/test/CodeGen/Mips/mips16_32_1.ll
llvm/trunk/test/CodeGen/Mips/mips16_32_10.ll
llvm/trunk/test/CodeGen/Mips/mips16_32_3.ll
llvm/trunk/test/CodeGen/Mips/mips16_32_4.ll
llvm/trunk/test/CodeGen/Mips/mips16_32_5.ll
llvm/trunk/test/CodeGen/Mips/mips16_32_6.ll
llvm/trunk/test/CodeGen/Mips/mips16_32_7.ll
llvm/trunk/test/CodeGen/Mips/mips16_32_8.ll
llvm/trunk/test/CodeGen/Mips/mips16_32_9.ll
llvm/trunk/test/CodeGen/Mips/s2rem.ll
llvm/trunk/test/CodeGen/Mips/sr1.ll
Modified: llvm/trunk/lib/Target/Mips/Mips16FrameLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16FrameLowering.cpp?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips16FrameLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/Mips16FrameLowering.cpp Sun Dec 15 14:49:30 2013
@@ -54,35 +54,24 @@ void Mips16FrameLowering::emitPrologue(M
MMI.addFrameInst(
MCCFIInstruction::createDefCfaOffset(AdjustSPLabel, -StackSize));
+ const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
+
+ if (CSI.size()) {
MCSymbol *CSLabel = MMI.getContext().CreateTempSymbol();
BuildMI(MBB, MBBI, dl,
TII.get(TargetOpcode::PROLOG_LABEL)).addSym(CSLabel);
- const MipsRegisterInfo &RI = TII.getRegisterInfo();
- const BitVector Reserved = RI.getReservedRegs(MF);
- bool SaveS2 = Reserved[Mips::S2];
- int Offset=-4;
- unsigned RA = MRI->getDwarfRegNum(Mips::RA, true);
- MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, RA, Offset));
- Offset -= 4;
-
- if (SaveS2) {
- unsigned S2 = MRI->getDwarfRegNum(Mips::S2, true);
- MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S2, Offset));
- Offset -= 4;
- }
-
-
- unsigned S1 = MRI->getDwarfRegNum(Mips::S1, true);
- MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S1, Offset));
- Offset -= 4;
-
- unsigned S0 = MRI->getDwarfRegNum(Mips::S0, true);
- MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S0, Offset));
-
-
+ const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
+ for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
+ E = CSI.end(); I != E; ++I) {
+ int64_t Offset = MFI->getObjectOffset(I->getFrameIdx());
+ unsigned Reg = I->getReg();
+ unsigned DReg = MRI->getDwarfRegNum(Reg, true);
+ MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, DReg, Offset));
+ }
+ }
if (hasFP(MF))
BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0)
.addReg(Mips::SP);
@@ -183,10 +172,15 @@ Mips16FrameLowering::hasReservedCallFram
void Mips16FrameLowering::
processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
RegScavenger *RS) const {
- MF.getRegInfo().setPhysRegUsed(Mips::RA);
- MF.getRegInfo().setPhysRegUsed(Mips::S0);
- MF.getRegInfo().setPhysRegUsed(Mips::S1);
- MF.getRegInfo().setPhysRegUsed(Mips::S2);
+ const Mips16InstrInfo &TII =
+ *static_cast<const Mips16InstrInfo*>(MF.getTarget().getInstrInfo());
+ const MipsRegisterInfo &RI = TII.getRegisterInfo();
+ const BitVector Reserved = RI.getReservedRegs(MF);
+ bool SaveS2 = Reserved[Mips::S2];
+ if (SaveS2)
+ MF.getRegInfo().setPhysRegUsed(Mips::S2);
+ if (hasFP(MF))
+ MF.getRegInfo().setPhysRegUsed(Mips::S0);
}
const MipsFrameLowering *
Modified: llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp Sun Dec 15 14:49:30 2013
@@ -169,35 +169,59 @@ unsigned Mips16InstrInfo::getOppositeBra
return 0;
}
+static void addSaveRestoreRegs(MachineInstrBuilder &MIB,
+ const std::vector<CalleeSavedInfo> &CSI, unsigned Flags=0) {
+ if (CSI.size()==0) return;
+ for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
+ // Add the callee-saved register as live-in. Do not add if the register is
+ // RA and return address is taken, because it has already been added in
+ // method MipsTargetLowering::LowerRETURNADDR.
+ // It's killed at the spill, unless the register is RA and return address
+ // is taken.
+ unsigned Reg = CSI[e-i-1].getReg();
+ switch (Reg) {
+ case Mips::RA:
+ case Mips::S0:
+ case Mips::S1:
+ MIB.addReg(Reg, Flags);
+ break;
+ case Mips::S2:
+ break;
+ default:
+ llvm_unreachable("unexpected mips16 callee saved register");
+
+ }
+ }
+
+}
// Adjust SP by FrameSize bytes. Save RA, S0, S1
void Mips16InstrInfo::makeFrame(unsigned SP, int64_t FrameSize,
MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const {
DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
- const BitVector Reserved = RI.getReservedRegs(*MBB.getParent());
+ MachineFunction &MF = *MBB.getParent();
+ MachineFrameInfo *MFI = MF.getFrameInfo();
+ const BitVector Reserved = RI.getReservedRegs(MF);
bool SaveS2 = Reserved[Mips::S2];
MachineInstrBuilder MIB;
unsigned Opc = ((FrameSize <= 128) && !SaveS2)? Mips::Save16:Mips::SaveX16;
+ MIB = BuildMI(MBB, I, DL, get(Opc));
+ const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
+ addSaveRestoreRegs(MIB, CSI);
+ if (SaveS2)
+ MIB.addReg(Mips::S2);
if (isUInt<11>(FrameSize))
- MIB = BuildMI(
- MBB, I, DL, get(Opc)).addReg(Mips::RA).
- addReg(Mips::S0).
- addReg(Mips::S1).addImm(FrameSize);
+ MIB.addImm(FrameSize);
else {
int Base = 2040; // should create template function like isUInt that
// returns largest possible n bit unsigned integer
int64_t Remainder = FrameSize - Base;
- MIB = BuildMI(
- MBB, I, DL, get(Opc)).addReg(Mips::RA).
- addReg(Mips::S0).
- addReg(Mips::S1).addImm(Base);
+ MIB.addImm(Base);
if (isInt<16>(-Remainder))
BuildAddiuSpImm(MBB, I, -Remainder);
else
adjustStackPtrBig(SP, -Remainder, MBB, I, Mips::V0, Mips::V1);
}
- if (SaveS2)
- MIB.addReg(Mips::S2);
}
// Adjust SP by FrameSize bytes. Restore RA, S0, S1
@@ -205,35 +229,31 @@ void Mips16InstrInfo::restoreFrame(unsig
MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const {
DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
- const BitVector Reserved = RI.getReservedRegs(*MBB.getParent());
+ MachineFunction *MF = MBB.getParent();
+ MachineFrameInfo *MFI = MF->getFrameInfo();
+ const BitVector Reserved = RI.getReservedRegs(*MF);
bool SaveS2 = Reserved[Mips::S2];
MachineInstrBuilder MIB;
unsigned Opc = ((FrameSize <= 128) && !SaveS2)?
Mips::Restore16:Mips::RestoreX16;
- if (isUInt<11>(FrameSize))
- MIB = BuildMI(
- MBB, I, DL, get(Opc)).
- addReg(Mips::RA, RegState::Define).
- addReg(Mips::S0, RegState::Define).
- addReg(Mips::S1, RegState::Define).
- addImm(FrameSize);
- else {
- int Base = 2040; // should create template function like isUInt that
- // returns largest possible n bit unsigned integer
+
+ if (!isUInt<11>(FrameSize)) {
+ unsigned Base = 2040;
int64_t Remainder = FrameSize - Base;
+ FrameSize = Base; // should create template function like isUInt that
+ // returns largest possible n bit unsigned integer
+
if (isInt<16>(Remainder))
BuildAddiuSpImm(MBB, I, Remainder);
else
adjustStackPtrBig(SP, Remainder, MBB, I, Mips::A0, Mips::A1);
- MIB = BuildMI(
- MBB, I, DL, get(Opc)).
- addReg(Mips::RA, RegState::Define).
- addReg(Mips::S0, RegState::Define).
- addReg(Mips::S1, RegState::Define).
- addImm(Base);
}
+ MIB = BuildMI(MBB, I, DL, get(Opc));
+ const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
+ addSaveRestoreRegs(MIB, CSI, RegState::Define);
if (SaveS2)
MIB.addReg(Mips::S2, RegState::Define);
+ MIB.addImm(FrameSize);
}
// Adjust SP by Amount bytes where bytes can be up to 32bit number.
Modified: llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td Sun Dec 15 14:49:30 2013
@@ -1376,7 +1376,9 @@ def: Mips16Pat<
let isCall=1, hasDelaySlot=0 in
def JumpLinkReg16:
FRR16_JALRC<0, 0, 0, (outs), (ins CPU16Regs:$rs),
- "jalrc \t$rs", [(MipsJmpLink CPU16Regs:$rs)], IIBranch>;
+ "jalrc \t$rs", [(MipsJmpLink CPU16Regs:$rs)], IIBranch> {
+ let Defs = [RA];
+}
// Mips16 pseudos
let isReturn=1, isTerminator=1, hasDelaySlot=1, isBarrier=1, hasCtrlDep=1,
@@ -1892,7 +1894,7 @@ def GotPrologue16:
MipsPseudo16<
(outs CPU16Regs:$rh, CPU16Regs:$rl),
(ins simm16:$immHi, simm16:$immLo),
- ".align 2\n\tli\t$rh, $immHi\n\taddiu\t$rl, $$pc, $immLo\n ",[]> ;
+ "\tli\t$rh, $immHi\n\taddiu\t$rl, $$pc, $immLo\n ",[]> ;
// An operand for the CONSTPOOL_ENTRY pseudo-instruction.
def cpinst_operand : Operand<i32> {
Modified: llvm/trunk/lib/Target/Mips/MipsCallingConv.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsCallingConv.td?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsCallingConv.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsCallingConv.td Sun Dec 15 14:49:30 2013
@@ -246,4 +246,6 @@ def CSR_N64 : CalleeSavedRegs<(add (sequ
GP_64, (sequence "S%u_64", 7, 0))>;
def CSR_Mips16RetHelper :
- CalleeSavedRegs<(add V0, V1, (sequence "A%u", 3, 0), S0, S1)>;
+ CalleeSavedRegs<(add V0, V1, FP,
+ (sequence "A%u", 3, 0), (sequence "S%u", 7, 0),
+ (sequence "D%u", 15, 10))>;
Modified: llvm/trunk/test/CodeGen/Mips/align16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/align16.ll?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/align16.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/align16.ll Sun Dec 15 14:49:30 2013
@@ -25,7 +25,7 @@ entry:
call void @p(i32* %arrayidx1)
ret void
}
-; 16: save $ra, $16, $17, 2040
-; 16: addiu $sp, -56 # 16 bit inst
-; 16: addiu $sp, 56 # 16 bit inst
-; 16: restore $ra, $16, $17, 2040
+; 16: save $ra, 2040
+; 16: addiu $sp, -40 # 16 bit inst
+; 16: addiu $sp, 40 # 16 bit inst
+; 16: restore $ra, 2040
Modified: llvm/trunk/test/CodeGen/Mips/alloca16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/alloca16.ll?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/alloca16.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/alloca16.ll Sun Dec 15 14:49:30 2013
@@ -19,8 +19,8 @@ entry:
define void @test() nounwind {
entry:
-; 16: .frame $sp,24,$ra
-; 16: save $ra, $16, $17, 24
+; 16: .frame $sp,8,$ra
+; 16: save 8 # 16 bit inst
; 16: move $16, $sp
; 16: move ${{[0-9]+}}, $sp
; 16: subu $[[REGISTER:[0-9]+]], ${{[0-9]+}}, ${{[0-9]+}}
Modified: llvm/trunk/test/CodeGen/Mips/ex2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/ex2.ll?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/ex2.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/ex2.ll Sun Dec 15 14:49:30 2013
@@ -6,11 +6,11 @@
define i32 @main() {
; 16-LABEL: main:
; 16: .cfi_startproc
-; 16: save $ra, $16, $17, 40
-; 16: .cfi_def_cfa_offset 40
+; 16: save $16, $17, $ra, 32 # 16 bit inst
+; 16: .cfi_def_cfa_offset 32
; 16: .cfi_offset 31, -4
-; 16: .cfi_offset 17, -8
-; 16: .cfi_offset 16, -12
+; 16: .cfi_offset 17, -8
+; 16: .cfi_offset 16, -12
; 16: .cfi_endproc
entry:
%retval = alloca i32, align 4
Modified: llvm/trunk/test/CodeGen/Mips/fp16mix.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/fp16mix.ll?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/fp16mix.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/fp16mix.ll Sun Dec 15 14:49:30 2013
@@ -17,7 +17,7 @@ entry:
; fmask1: .set reorder
; fmask1: .end foo1
; fmask2: .ent foo1
-; fmask2: save {{.*}}
+; fmask2: jrc $ra
; fmask2: .end foo1
; fmask1nr: .ent foo1
; fmask1nr: .set noreorder
@@ -42,10 +42,10 @@ entry:
; fmask2: .set reorder
; fmask2: .end foo2
; fmask1: .ent foo2
-; fmask1: save {{.*}}
+; fmask1: jrc $ra
; fmask1: .end foo2
; fmask1nr: .ent foo2
-; fmask1nr: save {{.*}}
+; fmask1nr: jrc $ra
; fmask1nr: .end foo2
}
@@ -62,10 +62,10 @@ entry:
; fmask1: .set reorder
; fmask1: .end foo3
; fmask2: .ent foo3
-; fmask2: save {{.*}}
+; fmask2: jrc $ra
; fmask2: .end foo3
; fmask1r: .ent foo3
-; fmask1r: save {{.*}}
+; fmask1r: jrc $ra
; fmask1r: .end foo3
}
@@ -82,10 +82,10 @@ entry:
; fmask2: .set reorder
; fmask2: .end foo4
; fmask1: .ent foo4
-; fmask1: save {{.*}}
+; fmask1: jrc $ra
; fmask1: .end foo4
; fmask1nr: .ent foo4
-; fmask1nr: save {{.*}}
+; fmask1nr: jrc $ra
; fmask1nr: .end foo4
}
Modified: llvm/trunk/test/CodeGen/Mips/helloworld.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/helloworld.ll?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/helloworld.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/helloworld.ll Sun Dec 15 14:49:30 2013
@@ -25,10 +25,9 @@ entry:
; SR32: .set noreorder
; SR32: .set nomacro
; SR32: .set noat
-; SR: save $ra, $16, $17, [[FS:[0-9]+]]
+; SR: save $ra, 24 # 16 bit inst
; PE: .ent main
-; PE: .align 2
-; PE-NEXT: li $[[T1:[0-9]+]], %hi(_gp_disp)
+; PE: li $[[T1:[0-9]+]], %hi(_gp_disp)
; PE-NEXT: addiu $[[T2:[0-9]+]], $pc, %lo(_gp_disp)
; PE: sll $[[T3:[0-9]+]], $[[T1]], 16
; C1: lw ${{[0-9]+}}, %got($.str)(${{[0-9]+}})
@@ -37,7 +36,7 @@ entry:
; C2: move $25, ${{[0-9]+}}
; C1: move $gp, ${{[0-9]+}}
; C1: jalrc ${{[0-9]+}}
-; SR: restore $ra, $16, $17, [[FS]]
+; SR: restore $ra, 24 # 16 bit inst
; PE: li $2, 0
; PE: jrc $ra
Removed: llvm/trunk/test/CodeGen/Mips/largefr1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/largefr1.ll?rev=197349&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/largefr1.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/largefr1.ll (removed)
@@ -1,76 +0,0 @@
-; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static -mips16-constant-islands=false < %s | FileCheck %s -check-prefix=1
-
-; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -soft-float -mips16-hard-float -relocation-model=pic < %s | FileCheck %s -check-prefix=ci
-
- at i = common global i32 0, align 4
- at j = common global i32 0, align 4
- at .str = private unnamed_addr constant [8 x i8] c"%i %i \0A\00", align 1
-
-define void @foo(i32* %p, i32 %i, i32 %j) nounwind {
-entry:
- %p.addr = alloca i32*, align 4
- %i.addr = alloca i32, align 4
- %j.addr = alloca i32, align 4
- store i32* %p, i32** %p.addr, align 4
- store i32 %i, i32* %i.addr, align 4
- store i32 %j, i32* %j.addr, align 4
- %0 = load i32* %j.addr, align 4
- %1 = load i32** %p.addr, align 4
- %2 = load i32* %i.addr, align 4
- %add.ptr = getelementptr inbounds i32* %1, i32 %2
- store i32 %0, i32* %add.ptr, align 4
- ret void
-}
-
-define i32 @main() nounwind {
-entry:
-; 1-LABEL: main:
-; 1: 1: .word -798000
-; 1: lw ${{[0-9]+}}, 1f
-; 1: b 2f
-; 1: .align 2
-; 1: .word 800020
-
-; 1: b 2f
-; 1: .align 2
-; 1: .word 400020
-
-; 1: move ${{[0-9]+}}, $sp
-; 1: addu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
-; 1: addiu ${{[0-9]+}}, ${{[0-9]+}}, 0
-
-
-
-; 1: b 2f
-; 1: .align 2
-; 1: .word 400220
-
-; 1: move ${{[0-9]+}}, $sp
-; 1: addu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
-; 1: lw ${{[0-9]+}}, 0(${{[0-9]+}})
-
-
-
-
- %retval = alloca i32, align 4
- %one = alloca [100000 x i32], align 4
- %two = alloca [100000 x i32], align 4
- store i32 0, i32* %retval
- %arrayidx = getelementptr inbounds [100000 x i32]* %one, i32 0, i32 0
- call void @foo(i32* %arrayidx, i32 50, i32 9999)
- %arrayidx1 = getelementptr inbounds [100000 x i32]* %two, i32 0, i32 0
- call void @foo(i32* %arrayidx1, i32 99999, i32 5555)
- %arrayidx2 = getelementptr inbounds [100000 x i32]* %one, i32 0, i32 50
- %0 = load i32* %arrayidx2, align 4
- store i32 %0, i32* @i, align 4
- %arrayidx3 = getelementptr inbounds [100000 x i32]* %two, i32 0, i32 99999
- %1 = load i32* %arrayidx3, align 4
- store i32 %1, i32* @j, align 4
- %2 = load i32* @i, align 4
- %3 = load i32* @j, align 4
- %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([8 x i8]* @.str, i32 0, i32 0), i32 %2, i32 %3)
- ret i32 0
-}
-
-; ci: lw ${{[0-9]+}}, $CPI{{[0-9]+}}_{{[0-9]+}}
-declare i32 @printf(i8*, ...)
Modified: llvm/trunk/test/CodeGen/Mips/mips16_32_1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/mips16_32_1.ll?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/mips16_32_1.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/mips16_32_1.ll Sun Dec 15 14:49:30 2013
@@ -8,7 +8,6 @@ entry:
; CHECK: .set mips16 # @foo
; CHECK: .ent foo
-; CHECK: save {{.+}}
-; CHECK: restore {{.+}}
+; CHECK: jrc $ra
; CHECK: .end foo
attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
Modified: llvm/trunk/test/CodeGen/Mips/mips16_32_10.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/mips16_32_10.ll?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/mips16_32_10.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/mips16_32_10.ll Sun Dec 15 14:49:30 2013
@@ -24,8 +24,7 @@ entry:
; 16: .set mips16 # @nofoo
; 16: .ent nofoo
-; 16: save {{.+}}
-; 16: restore {{.+}}
+; 16: jrc $ra
; 16: .end nofoo
define i32 @main() #2 {
Modified: llvm/trunk/test/CodeGen/Mips/mips16_32_3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/mips16_32_3.ll?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/mips16_32_3.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/mips16_32_3.ll Sun Dec 15 14:49:30 2013
@@ -8,13 +8,11 @@ entry:
; 16: .set mips16 # @foo
; 16: .ent foo
-; 16: save {{.+}}
-; 16: restore {{.+}}
+; 16: jrc $ra
; 16: .end foo
; 32: .set mips16 # @foo
; 32: .ent foo
-; 32: save {{.+}}
-; 32: restore {{.+}}
+; 32: jrc $ra
; 32: .end foo
define void @nofoo() #1 {
entry:
@@ -50,8 +48,7 @@ entry:
; 16: .set mips16 # @main
; 16: .ent main
-; 16: save {{.+}}
-; 16: restore {{.+}}
+; 16: jrc $ra
; 16: .end main
; 32: .set nomips16 # @main
; 32: .ent main
Modified: llvm/trunk/test/CodeGen/Mips/mips16_32_4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/mips16_32_4.ll?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/mips16_32_4.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/mips16_32_4.ll Sun Dec 15 14:49:30 2013
@@ -8,13 +8,11 @@ entry:
; 16: .set mips16 # @foo
; 16: .ent foo
-; 16: save {{.+}}
-; 16: restore {{.+}}
+; 16: jrc $ra
; 16: .end foo
; 32: .set mips16 # @foo
; 32: .ent foo
-; 32: save {{.+}}
-; 32: restore {{.+}}
+; 32: jrc $ra
; 32: .end foo
define void @nofoo() #1 {
entry:
@@ -50,13 +48,11 @@ entry:
; 16: .set mips16 # @main
; 16: .ent main
-; 16: save {{.+}}
-; 16: restore {{.+}}
+; 16: jrc $ra
; 16: .end main
; 32: .set mips16 # @main
; 32: .ent main
-; 32: save {{.+}}
-; 32: restore {{.+}}
+; 32: jrc $ra
; 32: .end main
Modified: llvm/trunk/test/CodeGen/Mips/mips16_32_5.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/mips16_32_5.ll?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/mips16_32_5.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/mips16_32_5.ll Sun Dec 15 14:49:30 2013
@@ -8,13 +8,11 @@ entry:
; 16: .set mips16 # @foo
; 16: .ent foo
-; 16: save {{.+}}
-; 16: restore {{.+}}
+; 16: jrc $ra
; 16: .end foo
; 32: .set mips16 # @foo
; 32: .ent foo
-; 32: save {{.+}}
-; 32: restore {{.+}}
+; 32: jrc $ra
; 32: .end foo
define void @nofoo() #1 {
entry:
Modified: llvm/trunk/test/CodeGen/Mips/mips16_32_6.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/mips16_32_6.ll?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/mips16_32_6.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/mips16_32_6.ll Sun Dec 15 14:49:30 2013
@@ -8,8 +8,7 @@ entry:
; 16: .set mips16 # @foo
; 16: .ent foo
-; 16: save {{.+}}
-; 16: restore {{.+}}
+; 16: jrc $ra
; 16: .end foo
; 32: .set nomips16 # @foo
; 32: .ent foo
Modified: llvm/trunk/test/CodeGen/Mips/mips16_32_7.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/mips16_32_7.ll?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/mips16_32_7.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/mips16_32_7.ll Sun Dec 15 14:49:30 2013
@@ -8,8 +8,7 @@ entry:
; 16: .set mips16 # @foo
; 16: .ent foo
-; 16: save {{.+}}
-; 16: restore {{.+}}
+; 16: jrc $ra
; 16: .end foo
; 32: .set nomips16 # @foo
; 32: .ent foo
@@ -56,14 +55,12 @@ entry:
; 16: .set mips16 # @main
; 16: .ent main
-; 16: save {{.+}}
-; 16: restore {{.+}}
+; 16: jrc $ra
; 16: .end main
; 32: .set mips16 # @main
; 32: .ent main
-; 32: save {{.+}}
-; 32: restore {{.+}}
+; 32: jrc $ra
; 32: .end main
Modified: llvm/trunk/test/CodeGen/Mips/mips16_32_8.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/mips16_32_8.ll?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/mips16_32_8.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/mips16_32_8.ll Sun Dec 15 14:49:30 2013
@@ -16,8 +16,7 @@ entry:
; 32: .set mips16 # @foo
; 32: .ent foo
-; 32: save {{.+}}
-; 32: restore {{.+}}
+; 32: jrc $ra
; 32: .end foo
define void @nofoo() #1 {
Modified: llvm/trunk/test/CodeGen/Mips/mips16_32_9.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/mips16_32_9.ll?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/mips16_32_9.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/mips16_32_9.ll Sun Dec 15 14:49:30 2013
@@ -7,8 +7,7 @@ entry:
; 32: .set mips16 # @foo
; 32: .ent foo
-; 32: save {{.+}}
-; 32: restore {{.+}}
+; 32: jrc $ra
; 32: .end foo
define void @nofoo() #1 {
entry:
@@ -33,8 +32,7 @@ entry:
; 32: .set mips16 # @main
; 32: .ent main
-; 32: save {{.+}}
-; 32: restore {{.+}}
+; 32: jrc $ra
; 32: .end main
Modified: llvm/trunk/test/CodeGen/Mips/s2rem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/s2rem.ll?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/s2rem.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/s2rem.ll Sun Dec 15 14:49:30 2013
@@ -1,10 +1,7 @@
-; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=NEG
+; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC
-; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=NEG
+; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC
-; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=pic < %s | FileCheck %s
-
-; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static < %s | FileCheck %s
@xi = common global i32 0, align 4
@x = common global float 0.000000e+00, align 4
@@ -16,14 +13,14 @@ entry:
%call = call i32 @i(i32 1)
store i32 %call, i32* @xi, align 4
ret void
-; CHECK: .ent it
-; NEG: .ent it
-; CHECK: save $ra, $16, $17, [[FS:[0-9]+]]
-; NEG-NOT: save $ra, $16, $17, [[FS:[0-9]+]], $18
-; CHECK: restore $ra, $16, $17, [[FS]]
-; NEG-NOT: restore $ra, $16, $17, [[FS:[0-9]+]], $18
-; CHECK: .end it
-; NEG: .end it
+; PIC: .ent it
+; STATIC: .ent it
+; PIC: save $16, $17, $ra, [[FS:[0-9]+]]
+; STATIC: save $16, $ra, [[FS:[0-9]+]]
+; PIC: restore $16, $17, $ra, [[FS]]
+; STATIC: restore $16, $ra, [[FS]]
+; PIC: .end it
+; STATIC: .end it
}
declare i32 @i(i32) #1
@@ -34,10 +31,10 @@ entry:
%call = call float @f()
store float %call, float* @x, align 4
ret void
-; CHECK: .ent ft
-; CHECK: save $ra, $16, $17, [[FS:[0-9]+]], $18
-; CHECK: restore $ra, $16, $17, [[FS]], $18
-; CHECK: .end ft
+; PIC: .ent ft
+; PIC: save $16, $17, $ra, $18, [[FS:[0-9]+]]
+; PIC: restore $16, $17, $ra, $18, [[FS]]
+; PIC: .end ft
}
declare float @f() #1
@@ -48,10 +45,10 @@ entry:
%call = call double @d()
store double %call, double* @xd, align 8
ret void
-; CHECK: .ent dt
-; CHECK: save $ra, $16, $17, [[FS:[0-9]+]], $18
-; CHECK: restore $ra, $16, $17, [[FS]], $18
-; CHECK: .end dt
+; PIC: .ent dt
+; PIC: save $16, $17, $ra, $18, [[FS:[0-9]+]]
+; PIC: restore $16, $17, $ra, $18, [[FS]]
+; PIC: .end dt
}
declare double @d() #1
@@ -63,10 +60,10 @@ entry:
%call = call float @ff(float %0)
store float %call, float* @x, align 4
ret void
-; CHECK: .ent fft
-; CHECK: save $ra, $16, $17, [[FS:[0-9]+]], $18
-; CHECK: restore $ra, $16, $17, [[FS]], $18
-; CHECK: .end fft
+; PIC: .ent fft
+; PIC: save $16, $17, $ra, $18, [[FS:[0-9]+]]
+; PIC: restore $16, $17, $ra, $18, [[FS]]
+; PIC: .end fft
}
declare float @ff(float) #1
@@ -77,14 +74,14 @@ entry:
%0 = load float* @x, align 4
call void @vf(float %0)
ret void
-; CHECK: .ent vft
-; NEG: .ent vft
-; CHECK: save $ra, $16, $17, [[FS:[0-9]+]]
-; NEG-NOT: save $ra, $16, $17, [[FS:[0-9]+]], $18
-; CHECK: restore $ra, $16, $17, [[FS]]
-; NEG-NOT: restore $ra, $16, $17, [[FS:[0-9]+]], $18
-; CHECK: .end vft
-; NEG: .end vft
+; PIC: .ent vft
+; STATIC: .ent vft
+; PIC: save $16, $ra, [[FS:[0-9]+]]
+; STATIC: save $16, $ra, [[FS:[0-9]+]]
+; PIC: restore $16, $ra, [[FS]]
+; STATIC: restore $16, $ra, [[FS]]
+; PIC: .end vft
+; STATIC: .end vft
}
declare void @vf(float) #1
Modified: llvm/trunk/test/CodeGen/Mips/sr1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/Mips/sr1.ll?rev=197350&r1=197349&r2=197350&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/Mips/sr1.ll (original)
+++ llvm/trunk/test/CodeGen/Mips/sr1.ll Sun Dec 15 14:49:30 2013
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=NEG
-
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static < %s | FileCheck %s
+; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -relocation-model=static < %s | FileCheck %s -check-prefix=NEG
+
@f = common global float 0.000000e+00, align 4
; Function Attrs: nounwind
@@ -14,8 +14,8 @@ entry:
call void @x(i8* %arraydecay1)
ret void
; CHECK: .ent foo1
-; CHECK: save $ra, $16, $17, [[FS:[0-9]+]] # 16 bit inst
-; CHECK: restore $ra, $16, $17, [[FS]]
+; CHECK: save $16, $17, $ra, [[FS:[0-9]+]] # 16 bit inst
+; CHECK: restore $16, $17, $ra, [[FS]] # 16 bit inst
; CHECK: .end foo1
}
@@ -31,13 +31,9 @@ entry:
call void @x(i8* %arraydecay1)
ret void
; CHECK: .ent foo2
-; CHECK: save $ra, $16, $17, [[FS:[0-9]+]]
-; CHECK: restore $ra, $16, $17, [[FS]]
+; CHECK: save $16, $17, $ra, [[FS:[0-9]+]]
+; CHECK: restore $16, $17, $ra, [[FS]]
; CHECK: .end foo2
-; NEG: .ent foo2
-; NEG-NOT: save $ra, $16, $17, [[FS:[0-9]+]] # 16 bit inst
-; NEG-NOT: restore $ra, $16, $17, [[FS]] # 16 bit inst
-; NEG: .end foo2
}
; Function Attrs: nounwind
@@ -47,12 +43,12 @@ entry:
store float %call, float* @f, align 4
ret void
; CHECK: .ent foo3
-; CHECK: save $ra, $16, $17, [[FS:[0-9]+]], $18
-; CHECK: restore $ra, $16, $17, [[FS]], $18
+; CHECK: save $16, $17, $ra, $18, [[FS:[0-9]+]]
+; CHECK: restore $16, $17, $ra, $18, [[FS]]
; CHECK: .end foo3
; NEG: .ent foo3
-; NEG-NOT: save $ra, $16, $17, [[FS:[0-9]+]], $18 # 16 bit inst
-; NEG-NOT: restore $ra, $16, $17, [[FS]], $18 # 16 bit inst
+; NEG-NOT: save $16, $17, $ra, $18, [[FS:[0-9]+]] # 16 bit inst
+; NEG-NOT: restore $16, $17, $ra, $18, [[FS]] # 16 bit inst
; NEG: .end foo3
}
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