[PATCH] R600/SI: Comparisons set vcc / scc
Tom Stellard
tom at stellard.net
Wed Dec 11 18:38:32 PST 2013
On Tue, Dec 10, 2013 at 04:37:43PM -0800, Matt Arsenault wrote:
> http://llvm-reviews.chandlerc.com/D2377
>
> Files:
> lib/Target/R600/SIInstructions.td
>
> Index: lib/Target/R600/SIInstructions.td
> ===================================================================
> --- lib/Target/R600/SIInstructions.td
> +++ lib/Target/R600/SIInstructions.td
> @@ -114,7 +114,7 @@
> >;
> */
>
> -let isCompare = 1 in {
> +let isCompare = 1, Defs = [SCC] in {
> def S_CMPK_LG_I32 : SOPK_32 <0x00000004, "S_CMPK_LG_I32", []>;
> def S_CMPK_GT_I32 : SOPK_32 <0x00000005, "S_CMPK_GT_I32", []>;
> def S_CMPK_GE_I32 : SOPK_32 <0x00000006, "S_CMPK_GE_I32", []>;
> @@ -126,7 +126,7 @@
> def S_CMPK_GE_U32 : SOPK_32 <0x0000000c, "S_CMPK_GE_U32", []>;
> def S_CMPK_LT_U32 : SOPK_32 <0x0000000d, "S_CMPK_LT_U32", []>;
> def S_CMPK_LE_U32 : SOPK_32 <0x0000000e, "S_CMPK_LE_U32", []>;
> -} // End isCompare = 1
> +} // End isCompare = 1, Defs = [SCC]
>
> let Defs = [SCC], isCommutable = 1 in {
> def S_ADDK_I32 : SOPK_32 <0x0000000f, "S_ADDK_I32", []>;
> @@ -140,7 +140,7 @@
> //def S_SETREG_IMM32_B32 : SOPK_32 <0x00000015, "S_SETREG_IMM32_B32", []>;
> //def EXP : EXP_ <0x00000000, "EXP", []>;
>
> -let isCompare = 1 in {
> +let isCompare = 1, Defs = [VCC] in {
Only the 32-bit encoding for the V_CMP_* instructions implicitly defines
VCC. You will need to move Defs = [VCC] to the VOPC definition in
SIInstrFormats.td
-Tom
>
> defm V_CMP_F_F32 : VOPC_32 <0x00000000, "V_CMP_F_F32">;
> defm V_CMP_LT_F32 : VOPC_32 <0x00000001, "V_CMP_LT_F32", f32, COND_OLT>;
> @@ -159,7 +159,7 @@
> defm V_CMP_NLT_F32 : VOPC_32 <0x0000000e, "V_CMP_NLT_F32">;
> defm V_CMP_TRU_F32 : VOPC_32 <0x0000000f, "V_CMP_TRU_F32">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>
> defm V_CMPX_F_F32 : VOPC_32 <0x00000010, "V_CMPX_F_F32">;
> defm V_CMPX_LT_F32 : VOPC_32 <0x00000011, "V_CMPX_LT_F32">;
> @@ -178,7 +178,7 @@
> defm V_CMPX_NLT_F32 : VOPC_32 <0x0000001e, "V_CMPX_NLT_F32">;
> defm V_CMPX_TRU_F32 : VOPC_32 <0x0000001f, "V_CMPX_TRU_F32">;
>
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> defm V_CMP_F_F64 : VOPC_64 <0x00000020, "V_CMP_F_F64">;
> defm V_CMP_LT_F64 : VOPC_64 <0x00000021, "V_CMP_LT_F64", f64, COND_OLT>;
> @@ -197,7 +197,7 @@
> defm V_CMP_NLT_F64 : VOPC_64 <0x0000002e, "V_CMP_NLT_F64">;
> defm V_CMP_TRU_F64 : VOPC_64 <0x0000002f, "V_CMP_TRU_F64">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>
> defm V_CMPX_F_F64 : VOPC_64 <0x00000030, "V_CMPX_F_F64">;
> defm V_CMPX_LT_F64 : VOPC_64 <0x00000031, "V_CMPX_LT_F64">;
> @@ -216,7 +216,7 @@
> defm V_CMPX_NLT_F64 : VOPC_64 <0x0000003e, "V_CMPX_NLT_F64">;
> defm V_CMPX_TRU_F64 : VOPC_64 <0x0000003f, "V_CMPX_TRU_F64">;
>
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> defm V_CMPS_F_F32 : VOPC_32 <0x00000040, "V_CMPS_F_F32">;
> defm V_CMPS_LT_F32 : VOPC_32 <0x00000041, "V_CMPS_LT_F32">;
> @@ -235,7 +235,7 @@
> defm V_CMPS_NLT_F32 : VOPC_32 <0x0000004e, "V_CMPS_NLT_F32">;
> defm V_CMPS_TRU_F32 : VOPC_32 <0x0000004f, "V_CMPS_TRU_F32">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>
> defm V_CMPSX_F_F32 : VOPC_32 <0x00000050, "V_CMPSX_F_F32">;
> defm V_CMPSX_LT_F32 : VOPC_32 <0x00000051, "V_CMPSX_LT_F32">;
> @@ -254,7 +254,7 @@
> defm V_CMPSX_NLT_F32 : VOPC_32 <0x0000005e, "V_CMPSX_NLT_F32">;
> defm V_CMPSX_TRU_F32 : VOPC_32 <0x0000005f, "V_CMPSX_TRU_F32">;
>
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> defm V_CMPS_F_F64 : VOPC_64 <0x00000060, "V_CMPS_F_F64">;
> defm V_CMPS_LT_F64 : VOPC_64 <0x00000061, "V_CMPS_LT_F64">;
> @@ -273,7 +273,7 @@
> defm V_CMPS_NLT_F64 : VOPC_64 <0x0000006e, "V_CMPS_NLT_F64">;
> defm V_CMPS_TRU_F64 : VOPC_64 <0x0000006f, "V_CMPS_TRU_F64">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>
> defm V_CMPSX_F_F64 : VOPC_64 <0x00000070, "V_CMPSX_F_F64">;
> defm V_CMPSX_LT_F64 : VOPC_64 <0x00000071, "V_CMPSX_LT_F64">;
> @@ -292,7 +292,7 @@
> defm V_CMPSX_NLT_F64 : VOPC_64 <0x0000007e, "V_CMPSX_NLT_F64">;
> defm V_CMPSX_TRU_F64 : VOPC_64 <0x0000007f, "V_CMPSX_TRU_F64">;
>
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> defm V_CMP_F_I32 : VOPC_32 <0x00000080, "V_CMP_F_I32">;
> defm V_CMP_LT_I32 : VOPC_32 <0x00000081, "V_CMP_LT_I32", i32, COND_SLT>;
> @@ -303,7 +303,7 @@
> defm V_CMP_GE_I32 : VOPC_32 <0x00000086, "V_CMP_GE_I32", i32, COND_SGE>;
> defm V_CMP_T_I32 : VOPC_32 <0x00000087, "V_CMP_T_I32">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>
> defm V_CMPX_F_I32 : VOPC_32 <0x00000090, "V_CMPX_F_I32">;
> defm V_CMPX_LT_I32 : VOPC_32 <0x00000091, "V_CMPX_LT_I32">;
> @@ -314,7 +314,7 @@
> defm V_CMPX_GE_I32 : VOPC_32 <0x00000096, "V_CMPX_GE_I32">;
> defm V_CMPX_T_I32 : VOPC_32 <0x00000097, "V_CMPX_T_I32">;
>
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> defm V_CMP_F_I64 : VOPC_64 <0x000000a0, "V_CMP_F_I64">;
> defm V_CMP_LT_I64 : VOPC_64 <0x000000a1, "V_CMP_LT_I64", i64, COND_SLT>;
> @@ -325,7 +325,7 @@
> defm V_CMP_GE_I64 : VOPC_64 <0x000000a6, "V_CMP_GE_I64", i64, COND_SGE>;
> defm V_CMP_T_I64 : VOPC_64 <0x000000a7, "V_CMP_T_I64">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>
> defm V_CMPX_F_I64 : VOPC_64 <0x000000b0, "V_CMPX_F_I64">;
> defm V_CMPX_LT_I64 : VOPC_64 <0x000000b1, "V_CMPX_LT_I64">;
> @@ -336,7 +336,7 @@
> defm V_CMPX_GE_I64 : VOPC_64 <0x000000b6, "V_CMPX_GE_I64">;
> defm V_CMPX_T_I64 : VOPC_64 <0x000000b7, "V_CMPX_T_I64">;
>
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> defm V_CMP_F_U32 : VOPC_32 <0x000000c0, "V_CMP_F_U32">;
> defm V_CMP_LT_U32 : VOPC_32 <0x000000c1, "V_CMP_LT_U32", i32, COND_ULT>;
> @@ -347,7 +347,7 @@
> defm V_CMP_GE_U32 : VOPC_32 <0x000000c6, "V_CMP_GE_U32", i32, COND_UGE>;
> defm V_CMP_T_U32 : VOPC_32 <0x000000c7, "V_CMP_T_U32">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>
> defm V_CMPX_F_U32 : VOPC_32 <0x000000d0, "V_CMPX_F_U32">;
> defm V_CMPX_LT_U32 : VOPC_32 <0x000000d1, "V_CMPX_LT_U32">;
> @@ -358,7 +358,7 @@
> defm V_CMPX_GE_U32 : VOPC_32 <0x000000d6, "V_CMPX_GE_U32">;
> defm V_CMPX_T_U32 : VOPC_32 <0x000000d7, "V_CMPX_T_U32">;
>
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> defm V_CMP_F_U64 : VOPC_64 <0x000000e0, "V_CMP_F_U64">;
> defm V_CMP_LT_U64 : VOPC_64 <0x000000e1, "V_CMP_LT_U64", i64, COND_ULT>;
> @@ -369,7 +369,7 @@
> defm V_CMP_GE_U64 : VOPC_64 <0x000000e6, "V_CMP_GE_U64", i64, COND_UGE>;
> defm V_CMP_T_U64 : VOPC_64 <0x000000e7, "V_CMP_T_U64">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>
> defm V_CMPX_F_U64 : VOPC_64 <0x000000f0, "V_CMPX_F_U64">;
> defm V_CMPX_LT_U64 : VOPC_64 <0x000000f1, "V_CMPX_LT_U64">;
> @@ -380,21 +380,21 @@
> defm V_CMPX_GE_U64 : VOPC_64 <0x000000f6, "V_CMPX_GE_U64">;
> defm V_CMPX_T_U64 : VOPC_64 <0x000000f7, "V_CMPX_T_U64">;
>
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> defm V_CMP_CLASS_F32 : VOPC_32 <0x00000088, "V_CMP_CLASS_F32">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
> defm V_CMPX_CLASS_F32 : VOPC_32 <0x00000098, "V_CMPX_CLASS_F32">;
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> defm V_CMP_CLASS_F64 : VOPC_64 <0x000000a8, "V_CMP_CLASS_F64">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
> defm V_CMPX_CLASS_F64 : VOPC_64 <0x000000b8, "V_CMPX_CLASS_F64">;
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> -} // End isCompare = 1
> +} // End isCompare = 1, Defs = [VCC]
>
> def DS_ADD_U32_RTN : DS_1A1D_RET <0x20, "DS_ADD_U32_RTN", VReg_32>;
> def DS_SUB_U32_RTN : DS_1A1D_RET <0x21, "DS_SUB_U32_RTN", VReg_32>;
> Index: lib/Target/R600/SIInstructions.td
> ===================================================================
> --- lib/Target/R600/SIInstructions.td
> +++ lib/Target/R600/SIInstructions.td
> @@ -114,7 +114,7 @@
> >;
> */
>
> -let isCompare = 1 in {
> +let isCompare = 1, Defs = [SCC] in {
> def S_CMPK_LG_I32 : SOPK_32 <0x00000004, "S_CMPK_LG_I32", []>;
> def S_CMPK_GT_I32 : SOPK_32 <0x00000005, "S_CMPK_GT_I32", []>;
> def S_CMPK_GE_I32 : SOPK_32 <0x00000006, "S_CMPK_GE_I32", []>;
> @@ -126,7 +126,7 @@
> def S_CMPK_GE_U32 : SOPK_32 <0x0000000c, "S_CMPK_GE_U32", []>;
> def S_CMPK_LT_U32 : SOPK_32 <0x0000000d, "S_CMPK_LT_U32", []>;
> def S_CMPK_LE_U32 : SOPK_32 <0x0000000e, "S_CMPK_LE_U32", []>;
> -} // End isCompare = 1
> +} // End isCompare = 1, Defs = [SCC]
>
> let Defs = [SCC], isCommutable = 1 in {
> def S_ADDK_I32 : SOPK_32 <0x0000000f, "S_ADDK_I32", []>;
> @@ -140,7 +140,7 @@
> //def S_SETREG_IMM32_B32 : SOPK_32 <0x00000015, "S_SETREG_IMM32_B32", []>;
> //def EXP : EXP_ <0x00000000, "EXP", []>;
>
> -let isCompare = 1 in {
> +let isCompare = 1, Defs = [VCC] in {
>
> defm V_CMP_F_F32 : VOPC_32 <0x00000000, "V_CMP_F_F32">;
> defm V_CMP_LT_F32 : VOPC_32 <0x00000001, "V_CMP_LT_F32", f32, COND_OLT>;
> @@ -159,7 +159,7 @@
> defm V_CMP_NLT_F32 : VOPC_32 <0x0000000e, "V_CMP_NLT_F32">;
> defm V_CMP_TRU_F32 : VOPC_32 <0x0000000f, "V_CMP_TRU_F32">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>
> defm V_CMPX_F_F32 : VOPC_32 <0x00000010, "V_CMPX_F_F32">;
> defm V_CMPX_LT_F32 : VOPC_32 <0x00000011, "V_CMPX_LT_F32">;
> @@ -178,7 +178,7 @@
> defm V_CMPX_NLT_F32 : VOPC_32 <0x0000001e, "V_CMPX_NLT_F32">;
> defm V_CMPX_TRU_F32 : VOPC_32 <0x0000001f, "V_CMPX_TRU_F32">;
>
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> defm V_CMP_F_F64 : VOPC_64 <0x00000020, "V_CMP_F_F64">;
> defm V_CMP_LT_F64 : VOPC_64 <0x00000021, "V_CMP_LT_F64", f64, COND_OLT>;
> @@ -197,7 +197,7 @@
> defm V_CMP_NLT_F64 : VOPC_64 <0x0000002e, "V_CMP_NLT_F64">;
> defm V_CMP_TRU_F64 : VOPC_64 <0x0000002f, "V_CMP_TRU_F64">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>
> defm V_CMPX_F_F64 : VOPC_64 <0x00000030, "V_CMPX_F_F64">;
> defm V_CMPX_LT_F64 : VOPC_64 <0x00000031, "V_CMPX_LT_F64">;
> @@ -216,7 +216,7 @@
> defm V_CMPX_NLT_F64 : VOPC_64 <0x0000003e, "V_CMPX_NLT_F64">;
> defm V_CMPX_TRU_F64 : VOPC_64 <0x0000003f, "V_CMPX_TRU_F64">;
>
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> defm V_CMPS_F_F32 : VOPC_32 <0x00000040, "V_CMPS_F_F32">;
> defm V_CMPS_LT_F32 : VOPC_32 <0x00000041, "V_CMPS_LT_F32">;
> @@ -235,7 +235,7 @@
> defm V_CMPS_NLT_F32 : VOPC_32 <0x0000004e, "V_CMPS_NLT_F32">;
> defm V_CMPS_TRU_F32 : VOPC_32 <0x0000004f, "V_CMPS_TRU_F32">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>
> defm V_CMPSX_F_F32 : VOPC_32 <0x00000050, "V_CMPSX_F_F32">;
> defm V_CMPSX_LT_F32 : VOPC_32 <0x00000051, "V_CMPSX_LT_F32">;
> @@ -254,7 +254,7 @@
> defm V_CMPSX_NLT_F32 : VOPC_32 <0x0000005e, "V_CMPSX_NLT_F32">;
> defm V_CMPSX_TRU_F32 : VOPC_32 <0x0000005f, "V_CMPSX_TRU_F32">;
>
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> defm V_CMPS_F_F64 : VOPC_64 <0x00000060, "V_CMPS_F_F64">;
> defm V_CMPS_LT_F64 : VOPC_64 <0x00000061, "V_CMPS_LT_F64">;
> @@ -273,7 +273,7 @@
> defm V_CMPS_NLT_F64 : VOPC_64 <0x0000006e, "V_CMPS_NLT_F64">;
> defm V_CMPS_TRU_F64 : VOPC_64 <0x0000006f, "V_CMPS_TRU_F64">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>
> defm V_CMPSX_F_F64 : VOPC_64 <0x00000070, "V_CMPSX_F_F64">;
> defm V_CMPSX_LT_F64 : VOPC_64 <0x00000071, "V_CMPSX_LT_F64">;
> @@ -292,7 +292,7 @@
> defm V_CMPSX_NLT_F64 : VOPC_64 <0x0000007e, "V_CMPSX_NLT_F64">;
> defm V_CMPSX_TRU_F64 : VOPC_64 <0x0000007f, "V_CMPSX_TRU_F64">;
>
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> defm V_CMP_F_I32 : VOPC_32 <0x00000080, "V_CMP_F_I32">;
> defm V_CMP_LT_I32 : VOPC_32 <0x00000081, "V_CMP_LT_I32", i32, COND_SLT>;
> @@ -303,7 +303,7 @@
> defm V_CMP_GE_I32 : VOPC_32 <0x00000086, "V_CMP_GE_I32", i32, COND_SGE>;
> defm V_CMP_T_I32 : VOPC_32 <0x00000087, "V_CMP_T_I32">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>
> defm V_CMPX_F_I32 : VOPC_32 <0x00000090, "V_CMPX_F_I32">;
> defm V_CMPX_LT_I32 : VOPC_32 <0x00000091, "V_CMPX_LT_I32">;
> @@ -314,7 +314,7 @@
> defm V_CMPX_GE_I32 : VOPC_32 <0x00000096, "V_CMPX_GE_I32">;
> defm V_CMPX_T_I32 : VOPC_32 <0x00000097, "V_CMPX_T_I32">;
>
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> defm V_CMP_F_I64 : VOPC_64 <0x000000a0, "V_CMP_F_I64">;
> defm V_CMP_LT_I64 : VOPC_64 <0x000000a1, "V_CMP_LT_I64", i64, COND_SLT>;
> @@ -325,7 +325,7 @@
> defm V_CMP_GE_I64 : VOPC_64 <0x000000a6, "V_CMP_GE_I64", i64, COND_SGE>;
> defm V_CMP_T_I64 : VOPC_64 <0x000000a7, "V_CMP_T_I64">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>
> defm V_CMPX_F_I64 : VOPC_64 <0x000000b0, "V_CMPX_F_I64">;
> defm V_CMPX_LT_I64 : VOPC_64 <0x000000b1, "V_CMPX_LT_I64">;
> @@ -336,7 +336,7 @@
> defm V_CMPX_GE_I64 : VOPC_64 <0x000000b6, "V_CMPX_GE_I64">;
> defm V_CMPX_T_I64 : VOPC_64 <0x000000b7, "V_CMPX_T_I64">;
>
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> defm V_CMP_F_U32 : VOPC_32 <0x000000c0, "V_CMP_F_U32">;
> defm V_CMP_LT_U32 : VOPC_32 <0x000000c1, "V_CMP_LT_U32", i32, COND_ULT>;
> @@ -347,7 +347,7 @@
> defm V_CMP_GE_U32 : VOPC_32 <0x000000c6, "V_CMP_GE_U32", i32, COND_UGE>;
> defm V_CMP_T_U32 : VOPC_32 <0x000000c7, "V_CMP_T_U32">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>
> defm V_CMPX_F_U32 : VOPC_32 <0x000000d0, "V_CMPX_F_U32">;
> defm V_CMPX_LT_U32 : VOPC_32 <0x000000d1, "V_CMPX_LT_U32">;
> @@ -358,7 +358,7 @@
> defm V_CMPX_GE_U32 : VOPC_32 <0x000000d6, "V_CMPX_GE_U32">;
> defm V_CMPX_T_U32 : VOPC_32 <0x000000d7, "V_CMPX_T_U32">;
>
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> defm V_CMP_F_U64 : VOPC_64 <0x000000e0, "V_CMP_F_U64">;
> defm V_CMP_LT_U64 : VOPC_64 <0x000000e1, "V_CMP_LT_U64", i64, COND_ULT>;
> @@ -369,7 +369,7 @@
> defm V_CMP_GE_U64 : VOPC_64 <0x000000e6, "V_CMP_GE_U64", i64, COND_UGE>;
> defm V_CMP_T_U64 : VOPC_64 <0x000000e7, "V_CMP_T_U64">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
>
> defm V_CMPX_F_U64 : VOPC_64 <0x000000f0, "V_CMPX_F_U64">;
> defm V_CMPX_LT_U64 : VOPC_64 <0x000000f1, "V_CMPX_LT_U64">;
> @@ -380,21 +380,21 @@
> defm V_CMPX_GE_U64 : VOPC_64 <0x000000f6, "V_CMPX_GE_U64">;
> defm V_CMPX_T_U64 : VOPC_64 <0x000000f7, "V_CMPX_T_U64">;
>
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> defm V_CMP_CLASS_F32 : VOPC_32 <0x00000088, "V_CMP_CLASS_F32">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
> defm V_CMPX_CLASS_F32 : VOPC_32 <0x00000098, "V_CMPX_CLASS_F32">;
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> defm V_CMP_CLASS_F64 : VOPC_64 <0x000000a8, "V_CMP_CLASS_F64">;
>
> -let hasSideEffects = 1, Defs = [EXEC] in {
> +let hasSideEffects = 1, Defs = [EXEC, VCC] in {
> defm V_CMPX_CLASS_F64 : VOPC_64 <0x000000b8, "V_CMPX_CLASS_F64">;
> -} // End hasSideEffects = 1, Defs = [EXEC]
> +} // End hasSideEffects = 1, Defs = [EXEC, VCC]
>
> -} // End isCompare = 1
> +} // End isCompare = 1, Defs = [VCC]
>
> def DS_ADD_U32_RTN : DS_1A1D_RET <0x20, "DS_ADD_U32_RTN", VReg_32>;
> def DS_SUB_U32_RTN : DS_1A1D_RET <0x21, "DS_SUB_U32_RTN", VReg_32>;
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