[llvm] r196731 - Make sure we mark these registers as defined. Previously was done

[Reed Kotler]

Author: rkotler
Date: Sun Dec  8 13:21:47 2013
New Revision: 196731

URL: http://llvm.org/viewvc/llvm-project?rev=196731&view=rev
Log:
Make sure we mark these registers as defined. Previously was done
in the td file.


Modified:
    llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp

Modified: llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp?rev=196731&r1=196730&r2=196731&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/Mips/Mips16InstrInfo.cpp Sun Dec  8 13:21:47 2013
@@ -229,9 +229,11 @@ void Mips16InstrInfo::restoreFrame(unsig
   DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
   if (!NeverUseSaveRestore) {
     if (isUInt<11>(FrameSize))
-      BuildMI(MBB, I, DL, get(Mips::RestoreX16)).addReg(Mips::RA).
-              addReg(Mips::S0).
-              addReg(Mips::S1).addReg(Mips::S2).addImm(FrameSize);
+      BuildMI(MBB, I, DL, get(Mips::RestoreX16)).
+              addReg(Mips::RA, RegState::Define).
+              addReg(Mips::S0, RegState::Define).
+              addReg(Mips::S1, RegState::Define).
+              addReg(Mips::S2, RegState::Define).addImm(FrameSize);
     else {
       int Base = 2040; // should create template function like isUInt that
                        // returns largest possible n bit unsigned integer
@@ -240,9 +242,11 @@ void Mips16InstrInfo::restoreFrame(unsig
         BuildAddiuSpImm(MBB, I, Remainder);
       else
         adjustStackPtrBig(SP, Remainder, MBB, I, Mips::A0, Mips::A1);
-      BuildMI(MBB, I, DL, get(Mips::RestoreX16)).addReg(Mips::RA).
-              addReg(Mips::S0).
-              addReg(Mips::S1).addReg(Mips::S2).addImm(Base);
+      BuildMI(MBB, I, DL, get(Mips::RestoreX16)).
+              addReg(Mips::RA, RegState::Define).
+              addReg(Mips::S0, RegState::Define).
+              addReg(Mips::S1, RegState::Define).
+              addReg(Mips::S2, RegState::Define).addImm(Base);
     }
   }
   else {