[Patch][AArch32] Fix vsel in compareinst optimization

[Quentin Colombet]

Hi Weiming,

The following code does not look correct:
-              Sub->getOperand(2).getReg() == SrcReg)
+              Sub->getOperand(2).getReg() == SrcReg && !IsInstrVSel)

Indeed, if the CMP and SUB have different operands order, the VSEL condition would need to be updated as well if the CMP is removed. Otherwise, we would not select the right operand, would we?
In other words, I think we are missing an update of the opcode of the VSEL in that case, since no condition code is available here.
Am I missing something?

You have a typo in the tests, this happens twice:
+; CHCK-NOT: cmp

The E is missing.

Thanks,
-Quentin

On Dec 5, 2013, at 3:19 PM, Weiming Zhao <weimingz at codeaurora.org> wrote:

> Hi,
>  
> Attached patch is to fix bug: http://llvm.org/bugs/show_bug.cgi?id=18149
>  
> Basically, the cmp optimization assumes a MI that uses CPSR has an immediate MO for ARMCC. But this is not true for VSEL instructions.
>  
> Thanks,
> Weiming
>  
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
>  
> <0001-Bug-18149-AArch32-VSel-instructions-has-no-ARMCC-fie.patch>_______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20131205/c5d582fa/attachment.html>