[llvm] r196467 - R600/SI: Add comments for number of used registers.
Matt Arsenault
Matthew.Arsenault at amd.com
Wed Dec 4 21:15:36 PST 2013
Author: arsenm
Date: Wed Dec 4 23:15:35 2013
New Revision: 196467
URL: http://llvm.org/viewvc/llvm-project?rev=196467&view=rev
Log:
R600/SI: Add comments for number of used registers.
Added:
llvm/trunk/test/CodeGen/R600/register-count-comments.ll
Modified:
llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp
llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.h
Modified: llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp?rev=196467&r1=196466&r2=196467&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.cpp Wed Dec 4 23:15:35 2013
@@ -46,8 +46,7 @@ extern "C" void LLVMInitializeR600AsmPri
}
AMDGPUAsmPrinter::AMDGPUAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
- : AsmPrinter(TM, Streamer)
-{
+ : AsmPrinter(TM, Streamer) {
DisasmEnabled = TM.getSubtarget<AMDGPUSubtarget>().dumpCode() &&
! Streamer.hasRawTextSupport();
}
@@ -56,6 +55,7 @@ AMDGPUAsmPrinter::AMDGPUAsmPrinter(Targe
/// the call to EmitFunctionHeader(), which the MCPureStreamer can't handle.
bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
SetupMachineFunction(MF);
+
if (OutStreamer.hasRawTextSupport()) {
OutStreamer.EmitRawText("@" + MF.getName() + ":");
}
@@ -65,9 +65,12 @@ bool AMDGPUAsmPrinter::runOnMachineFunct
ELF::SHT_PROGBITS, 0,
SectionKind::getReadOnly());
OutStreamer.SwitchSection(ConfigSection);
+
const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>();
+ SIProgramInfo KernelInfo;
if (STM.getGeneration() > AMDGPUSubtarget::NORTHERN_ISLANDS) {
- EmitProgramInfoSI(MF);
+ findNumUsedRegistersSI(MF, KernelInfo.NumSGPR, KernelInfo.NumVGPR);
+ EmitProgramInfoSI(MF, KernelInfo);
} else {
EmitProgramInfoR600(MF);
}
@@ -79,6 +82,19 @@ bool AMDGPUAsmPrinter::runOnMachineFunct
OutStreamer.SwitchSection(getObjFileLowering().getTextSection());
EmitFunctionBody();
+ if (isVerbose() && OutStreamer.hasRawTextSupport()) {
+ const MCSectionELF *CommentSection
+ = Context.getELFSection(".AMDGPU.csdata",
+ ELF::SHT_PROGBITS, 0,
+ SectionKind::getReadOnly());
+ OutStreamer.SwitchSection(CommentSection);
+
+ OutStreamer.EmitRawText(
+ Twine("; Kernel info:\n") +
+ "; NumSgprs: " + Twine(KernelInfo.NumSGPR) + "\n" +
+ "; NumVgprs: " + Twine(KernelInfo.NumVGPR) + "\n");
+ }
+
if (STM.dumpCode()) {
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
MF.dump();
@@ -166,8 +182,9 @@ void AMDGPUAsmPrinter::EmitProgramInfoR6
}
}
-void AMDGPUAsmPrinter::EmitProgramInfoSI(MachineFunction &MF) {
- const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>();
+void AMDGPUAsmPrinter::findNumUsedRegistersSI(MachineFunction &MF,
+ unsigned &NumSGPR,
+ unsigned &NumVGPR) const {
unsigned MaxSGPR = 0;
unsigned MaxVGPR = 0;
bool VCCUsed = false;
@@ -252,10 +269,24 @@ void AMDGPUAsmPrinter::EmitProgramInfoSI
}
}
}
- if (VCCUsed) {
+
+ if (VCCUsed)
MaxSGPR += 2;
- }
- SIMachineFunctionInfo * MFI = MF.getInfo<SIMachineFunctionInfo>();
+
+ NumSGPR = MaxSGPR;
+ NumVGPR = MaxVGPR;
+}
+
+void AMDGPUAsmPrinter::getSIProgramInfo(SIProgramInfo &Out,
+ MachineFunction &MF) const {
+ findNumUsedRegistersSI(MF, Out.NumSGPR, Out.NumVGPR);
+}
+
+void AMDGPUAsmPrinter::EmitProgramInfoSI(MachineFunction &MF,
+ const SIProgramInfo &KernelInfo) {
+ const AMDGPUSubtarget &STM = TM.getSubtarget<AMDGPUSubtarget>();
+
+ SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
unsigned RsrcReg;
switch (MFI->ShaderType) {
default: // Fall through
@@ -266,7 +297,8 @@ void AMDGPUAsmPrinter::EmitProgramInfoSI
}
OutStreamer.EmitIntValue(RsrcReg, 4);
- OutStreamer.EmitIntValue(S_00B028_VGPRS(MaxVGPR / 4) | S_00B028_SGPRS(MaxSGPR / 8), 4);
+ OutStreamer.EmitIntValue(S_00B028_VGPRS(KernelInfo.NumVGPR / 4) |
+ S_00B028_SGPRS(KernelInfo.NumSGPR / 8), 4);
unsigned LDSAlignShift;
if (STM.getGeneration() < AMDGPUSubtarget::SEA_ISLANDS) {
Modified: llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.h?rev=196467&r1=196466&r2=196467&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.h (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUAsmPrinter.h Wed Dec 4 23:15:35 2013
@@ -22,6 +22,21 @@
namespace llvm {
class AMDGPUAsmPrinter : public AsmPrinter {
+private:
+ struct SIProgramInfo {
+ unsigned NumSGPR;
+ unsigned NumVGPR;
+ };
+
+ void getSIProgramInfo(SIProgramInfo &Out, MachineFunction &MF) const;
+ void findNumUsedRegistersSI(MachineFunction &MF,
+ unsigned &NumSGPR,
+ unsigned &NumVGPR) const;
+
+ /// \brief Emit register usage information so that the GPU driver
+ /// can correctly setup the GPU state.
+ void EmitProgramInfoR600(MachineFunction &MF);
+ void EmitProgramInfoSI(MachineFunction &MF, const SIProgramInfo &KernelInfo);
public:
explicit AMDGPUAsmPrinter(TargetMachine &TM, MCStreamer &Streamer);
@@ -32,11 +47,6 @@ public:
return "AMDGPU Assembly Printer";
}
- /// \brief Emit register usage information so that the GPU driver
- /// can correctly setup the GPU state.
- void EmitProgramInfoR600(MachineFunction &MF);
- void EmitProgramInfoSI(MachineFunction &MF);
-
/// Implemented in AMDGPUMCInstLower.cpp
virtual void EmitInstruction(const MachineInstr *MI);
Added: llvm/trunk/test/CodeGen/R600/register-count-comments.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/register-count-comments.ll?rev=196467&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/R600/register-count-comments.ll (added)
+++ llvm/trunk/test/CodeGen/R600/register-count-comments.ll Wed Dec 4 23:15:35 2013
@@ -0,0 +1,20 @@
+; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s
+
+declare i32 @llvm.SI.tid() nounwind readnone
+
+; SI-LABEL: @foo:
+; SI: .section .AMDGPU.csdata
+; SI: ; Kernel info:
+; SI: ; NumSgprs: {{[0-9]+}}
+; SI: ; NumVgprs: {{[0-9]+}}
+define void @foo(i32 addrspace(1)* noalias %out, i32 addrspace(1)* %abase, i32 addrspace(1)* %bbase) nounwind {
+ %tid = call i32 @llvm.SI.tid() nounwind readnone
+ %aptr = getelementptr i32 addrspace(1)* %abase, i32 %tid
+ %bptr = getelementptr i32 addrspace(1)* %bbase, i32 %tid
+ %outptr = getelementptr i32 addrspace(1)* %out, i32 %tid
+ %a = load i32 addrspace(1)* %aptr, align 4
+ %b = load i32 addrspace(1)* %bptr, align 4
+ %result = add i32 %a, %b
+ store i32 %result, i32 addrspace(1)* %outptr, align 4
+ ret void
+}
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