[PATCH] [AArch64 NEON]Fix a assertion failure when disassemble SHLL instruction.

[Kevin Qin]

  Hi Tim,

  Firstly, I have to declare that this patch is NOT fully implemented yet. I tried to refactored my patch as your comments, using operand decoder instead instruction decoder, but faced some problems.

  1. If I implemented it as this patch shows, the decoder function DecodeExactImm wouldn't be used (even wouldn't be linked), because every bit is of Imm is certain.
  2. To expect the operand decoder being called, I have to removes  all lines like "let Inst{23-22} = 0b00;" to get Imm uncertain. Then other bits  can't differ SHLL8b8h, SHLL4h4s and SHLL2s2d. So some instructions conflict will rise in build time.

  Do you have any good idea to solve this? If not, I think the previous solution is also acceptable after adding test case.

http://llvm-reviews.chandlerc.com/D2278

CHANGE SINCE LAST DIFF
  http://llvm-reviews.chandlerc.com/D2278?vs=5793&id=5808#toc

Files:
  lib/Target/AArch64/AArch64InstrFormats.td
  lib/Target/AArch64/AArch64InstrNEON.td
  lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
  test/MC/Disassembler/AArch64/neon-instructions.txt
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