[llvm] r195632 - X86: enable AVX2 under Haswell native compilation

[PaX Team]

On 25 Nov 2013 at 9:52, Tim Northover wrote:

> URL: http://llvm.org/viewvc/llvm-project?rev=195632&view=rev
> Log:
> X86: enable AVX2 under Haswell native compilation
> 
> Patch by Adam Strzelecki
> 
> --- llvm/trunk/lib/Support/Host.cpp (original)
> +++ llvm/trunk/lib/Support/Host.cpp Mon Nov 25 03:52:59 2013
> @@ -95,6 +95,75 @@ static bool GetX86CpuIDAndInfo(unsigned
>  #endif
>  }
>  
> +/// GetX86CpuIDAndInfoEx - Execute the specified cpuid with subleaf and return the
> +/// 4 values in the specified arguments.  If we can't run cpuid on the host,
> +/// return true.
> +bool GetX86CpuIDAndInfoEx(unsigned value, unsigned subleaf, unsigned *rEAX,
> +                          unsigned *rEBX, unsigned *rECX, unsigned *rEDX) {
> +#if defined(__x86_64__) || defined(_M_AMD64) || defined (_M_X64)
> +  #if defined(__GNUC__)
> +    // gcc doesn't know cpuid would clobber ebx/rbx. Preseve it manually.
> +    asm ("movq\t%%rbx, %%rsi\n\t"
> +         "cpuid\n\t"
> +         "xchgq\t%%rbx, %%rsi\n\t"
> +         : "=a" (*rEAX),
> +           "=S" (*rEBX),
> +           "=c" (*rECX),
> +           "=d" (*rEDX)
> +         :  "a" (value),
> +            "c" (subleaf));
> +    return false;

one question about this code (and the i386 counterpart): why can't you just
specify rbx/ebx as an output register? this is how linux has always done it
and it works fine with gcc.