[PATCH] switch ARM modes in inline asm

[David Peixotto]

Will this patch properly restore the mode when returning from the inlineasm? Say we have this function

foo() {
  // assembling in arm mode
  __asm__(".thumb")
  // are we still assembling in arm mode?
}

Will it make sure that the non-inline asm portions of the function are all compilied in arm mode?

> -----Original Message-----
> From: llvm-commits-bounces at cs.uiuc.edu [mailto:llvm-commits-
> bounces at cs.uiuc.edu] On Behalf Of Greg Fitzgerald
> Sent: Friday, November 22, 2013 12:37 PM
> To: grosbach at apple.com; amara.emerson at arm.com; garious at gmail.com;
> t.p.northover at gmail.com
> Cc: llvm-commits at cs.uiuc.edu
> Subject: [PATCH] switch ARM modes in inline asm
> 
> Hi grosbach, aemerson,
> 
> Fix inline assembly that switches between ARM and Thumb modes
> 
> This patch assumes the inline assembly is responsible for restoring the
> mode.
> 
> 
> http://llvm-reviews.chandlerc.com/D2255
> 
> Files:
>   lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
>   test/CodeGen/ARM/2013-11-22-inline-asm-switch-mode.ll
> 
> Index: lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
> ===================================================================
> --- lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
> +++ lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
> @@ -33,6 +33,7 @@
>  #include "llvm/Support/TargetRegistry.h"
>  #include "llvm/Support/raw_ostream.h"
>  #include "llvm/Target/TargetMachine.h"
> +#include "llvm/Target/TargetSubtargetInfo.h"
>  using namespace llvm;
> 
>  namespace {
> @@ -114,14 +115,11 @@
>                                                    OutContext,
> OutStreamer,
>                                                    *MAI));
> 
> -  // FIXME: It would be nice if we can avoid createing a new instance of
> -  // MCSubtargetInfo here given TargetSubtargetInfo is available.
> However,
> -  // we have to watch out for asm directives which can change subtarget
> -  // state. e.g. .code 16, .code 32.
> -  OwningPtr<MCSubtargetInfo>
> -    STI(TM.getTarget().createMCSubtargetInfo(TM.getTargetTriple(),
> -                                             TM.getTargetCPU(),
> -
> TM.getTargetFeatureString()));
> +  // Reuse the existing Subtarget, because the AsmParser will  //
> + modify it.  For example, when switching between ARM and  // Thumb
> + mode.
> +  const MCSubtargetInfo* STC = TM.getSubtargetImpl();
> +  MCSubtargetInfo* STI = const_cast<MCSubtargetInfo*>(STC);
>    OwningPtr<MCTargetAsmParser>
>      TAP(TM.getTarget().createMCAsmParser(*STI, *Parser, *MII));
>    if (!TAP)
> Index: test/CodeGen/ARM/2013-11-22-inline-asm-switch-mode.ll
> ===================================================================
> --- /dev/null
> +++ test/CodeGen/ARM/2013-11-22-inline-asm-switch-mode.ll
> @@ -0,0 +1,13 @@
> +;RUN:  llc -mtriple=thumbv7-linux-gnueabi -filetype=obj < %s |
> +llvm-objdump -arch=thumb -d - | FileCheck %s
> +
> +target triple = "thumbv7--linux-gnueabi"
> +
> +define hidden void @bah(i8* %start) #0 align 2 {
> +  %1 = ptrtoint i8* %start to i32
> +  %2 = tail call i32 asm sideeffect "@ Enter ARM Mode  \0A\09adr r3, 1f
> +\0A\09bx  r3 \0A\09.align 2 \0A\09.code 32 \0A1:  push {r7} \0A\09mov
> +r7, $4 \0A\09svc 0x0 \0A
> +  ret void
> +}
> +; CHECK: $a
> +; CHECK-NEXT: 04 70
> +; CHECK-NEXT: 2d e5
> +