[PATCH] R600/SI: Fixing handling of condition codes
Matt Arsenault
arsenm2 at gmail.com
Fri Nov 22 13:48:24 PST 2013
On Nov 19, 2013, at 6:49 PM, Tom Stellard <tom at stellard.net> wrote:
>
> -;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
> +;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK --check-prefix=F %s
> +;RUN: llc < %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI-CHECK --check-prefix=F %s
>
You don’t need to include “CHECK” in a check prefix. What does the F mean?
> -; CHECK: @setcc_v2i32
> -; EG-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW]}}, KC0[3].X, KC0[3].Z
> -; EG-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW]}}, KC0[2].W, KC0[3].Y
> +; F-LABEL: @setcc_v2i32
> +; R600-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW]}}, KC0[3].X, KC0[3].Z
> +; R600-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW]}}, KC0[2].W, KC0[3].Y
>
> define void @setcc_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %a, <2 x i32> %b) {
> %result = icmp eq <2 x i32> %a, %b
> @@ -11,11 +12,11 @@ define void @setcc_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> %a, <2 x i32> %
> ret void
> }
>
> -; CHECK: @setcc_v4i32
> -; EG-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> -; EG-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> -; EG-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> -; EG-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> +; F-LABEL: @setcc_v4i32
> +; R600-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> +; R600-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> +; R600-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
> +; R600-CHECK-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
>
> define void @setcc_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
> %b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1
> @@ -26,3 +27,307 @@ define void @setcc_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %
> store <4 x i32> %sext, <4 x i32> addrspace(1)* %out
> ret void
> }
> +
> +;;;==========================================================================;;;
> +;; Float comparisons
> +;;;==========================================================================;;;
> +
> +; F-LABEL: @f32_oeq
> +; R600-CHECK: SETE_DX10
> +; SI-CHECK: V_CMP_EQ_F32
> +define void @f32_oeq(i32 addrspace(1)* %out, float %a, float %b) {
> +entry:
> + %0 = fcmp oeq float %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f32_ogt
> +; R600-CHECK: SETGT_DX10
> +; SI-CHECK: V_CMP_GT_F32
> +define void @f32_ogt(i32 addrspace(1)* %out, float %a, float %b) {
> +entry:
> + %0 = fcmp ogt float %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f32_oge
> +; R600-CHECK: SETGE_DX10
> +; SI-CHECK: V_CMP_GE_F32
> +define void @f32_oge(i32 addrspace(1)* %out, float %a, float %b) {
> +entry:
> + %0 = fcmp oge float %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f32_olt
> +; R600-CHECK: SETGT_DX10
> +; SI-CHECK: V_CMP_LT_F32
> +define void @f32_olt(i32 addrspace(1)* %out, float %a, float %b) {
> +entry:
> + %0 = fcmp olt float %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f32_ole
> +; R600-CHECK: SETGE_DX10
> +; SI-CHECK: V_CMP_LE_F32
> +define void @f32_ole(i32 addrspace(1)* %out, float %a, float %b) {
> +entry:
> + %0 = fcmp ole float %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f32_one
> +; R600-CHECK-DAG: SETE_DX10
> +; R600-CHECK-DAG: SETE_DX10
> +; R600-CHECK-DAG: AND_INT
> +; R600-CHECK-DAG: SETNE_DX10
> +; R600-CHECK-DAG: AND_INT
> +; R600-CHECK-DAG: SETNE_INT
> +; SI-CHECK: V_CMP_O_F32
> +; SI-CHECK: V_CMP_NEQ_F32
> +; SI-CHECK: S_AND_B64
> +define void @f32_one(i32 addrspace(1)* %out, float %a, float %b) {
> +entry:
> + %0 = fcmp one float %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f32_ord
> +; R600-CHECK-DAG: SETE_DX10
> +; R600-CHECK-DAG: SETE_DX10
> +; R600-CHECK-DAG: AND_INT
> +; R600-CHECK-DAG: SETNE_INT
> +; SI-CHECK: V_CMP_O_F32
> +define void @f32_ord(i32 addrspace(1)* %out, float %a, float %b) {
> +entry:
> + %0 = fcmp ord float %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f32_ueq
> +; R600-CHECK-DAG: SETNE_DX10
> +; R600-CHECK-DAG: SETNE_DX10
> +; R600-CHECK-DAG: OR_INT
> +; R600-CHECK-DAG: SETE_DX10
> +; R600-CHECK-DAG: OR_INT
> +; R600-CHECK-DAG: SETNE_INT
> +; SI-CHECK: V_CMP_U_F32
> +; SI-CHECK: V_CMP_EQ_F32
> +; SI-CHECK: S_OR_B64
> +define void @f32_ueq(i32 addrspace(1)* %out, float %a, float %b) {
> +entry:
> + %0 = fcmp ueq float %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f32_ugt
> +; R600-CHECK: SETGE
> +; R600-CHECK: SETE_DX10
> +; SI-CHECK: V_CMP_U_F32
> +; SI-CHECK: V_CMP_GT_F32
> +; SI-CHECK: S_OR_B64
> +define void @f32_ugt(i32 addrspace(1)* %out, float %a, float %b) {
> +entry:
> + %0 = fcmp ugt float %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f32_uge
> +; R600-CHECK: SETGT
> +; R600-CHECK: SETE_DX10
> +; SI-CHECK: V_CMP_U_F32
> +; SI-CHECK: V_CMP_GE_F32
> +; SI-CHECK: S_OR_B64
> +define void @f32_uge(i32 addrspace(1)* %out, float %a, float %b) {
> +entry:
> + %0 = fcmp uge float %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f32_ult
> +; R600-CHECK: SETGE
> +; R600-CHECK: SETE_DX10
> +; SI-CHECK: V_CMP_U_F32
> +; SI-CHECK: V_CMP_LT_F32
> +; SI-CHECK: S_OR_B64
> +define void @f32_ult(i32 addrspace(1)* %out, float %a, float %b) {
> +entry:
> + %0 = fcmp ult float %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f32_ule
> +; R600-CHECK: SETGT
> +; R600-CHECK: SETE_DX10
> +; SI-CHECK: V_CMP_U_F32
> +; SI-CHECK: V_CMP_LE_F32
> +; SI-CHECK: S_OR_B64
> +define void @f32_ule(i32 addrspace(1)* %out, float %a, float %b) {
> +entry:
> + %0 = fcmp ule float %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f32_une
> +; R600-CHECK: SETNE_DX10
> +; SI-CHECK: V_CMP_NEQ_F32
> +define void @f32_une(i32 addrspace(1)* %out, float %a, float %b) {
> +entry:
> + %0 = fcmp une float %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f32_uno
> +; R600-CHECK: SETNE_DX10
> +; R600-CHECK: SETNE_DX10
> +; R600-CHECK: OR_INT
> +; R600-CHECK: SETNE_INT
> +; SI-CHECK: V_CMP_U_F32
> +define void @f32_uno(i32 addrspace(1)* %out, float %a, float %b) {
> +entry:
> + %0 = fcmp uno float %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +;;;==========================================================================;;;
> +;; 32-bit integer comparisons
> +;;;==========================================================================;;;
> +
> +; F-LABEL: @i32_eq
> +; R600-CHECK: SETE_INT
> +; SI-CHECK: V_CMP_EQ_I32
> +define void @i32_eq(i32 addrspace(1)* %out, i32 %a, i32 %b) {
> +entry:
> + %0 = icmp eq i32 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @i32_ne
> +; R600-CHECK: SETNE_INT
> +; SI-CHECK: V_CMP_NE_I32
> +define void @i32_ne(i32 addrspace(1)* %out, i32 %a, i32 %b) {
> +entry:
> + %0 = icmp ne i32 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @i32_ugt
> +; R600-CHECK: SETGT_UINT
> +; SI-CHECK: V_CMP_GT_U32
> +define void @i32_ugt(i32 addrspace(1)* %out, i32 %a, i32 %b) {
> +entry:
> + %0 = icmp ugt i32 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @i32_uge
> +; R600-CHECK: SETGE_UINT
> +; SI-CHECK: V_CMP_GE_U32
> +define void @i32_uge(i32 addrspace(1)* %out, i32 %a, i32 %b) {
> +entry:
> + %0 = icmp uge i32 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @i32_ult
> +; R600-CHECK: SETGT_UINT
> +; SI-CHECK: V_CMP_LT_U32
> +define void @i32_ult(i32 addrspace(1)* %out, i32 %a, i32 %b) {
> +entry:
> + %0 = icmp ult i32 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @i32_ule
> +; R600-CHECK: SETGE_UINT
> +; SI-CHECK: V_CMP_LE_U32
> +define void @i32_ule(i32 addrspace(1)* %out, i32 %a, i32 %b) {
> +entry:
> + %0 = icmp ule i32 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @i32_sgt
> +; R600-CHECK: SETGT_INT
> +; SI-CHECK: V_CMP_GT_I32
> +define void @i32_sgt(i32 addrspace(1)* %out, i32 %a, i32 %b) {
> +entry:
> + %0 = icmp sgt i32 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @i32_sge
> +; R600-CHECK: SETGE_INT
> +; SI-CHECK: V_CMP_GE_I32
> +define void @i32_sge(i32 addrspace(1)* %out, i32 %a, i32 %b) {
> +entry:
> + %0 = icmp sge i32 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @i32_slt
> +; R600-CHECK: SETGT_INT
> +; SI-CHECK: V_CMP_LT_I32
> +define void @i32_slt(i32 addrspace(1)* %out, i32 %a, i32 %b) {
> +entry:
> + %0 = icmp slt i32 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @i32_sle
> +; R600-CHECK: SETGE_INT
> +; SI-CHECK: V_CMP_LE_I32
> +define void @i32_sle(i32 addrspace(1)* %out, i32 %a, i32 %b) {
> +entry:
> + %0 = icmp sle i32 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> diff --git a/test/CodeGen/R600/setcc64.ll b/test/CodeGen/R600/setcc64.ll
> new file mode 100644
> index 0000000..42907ce
> --- /dev/null
> +++ b/test/CodeGen/R600/setcc64.ll
> @@ -0,0 +1,263 @@
> +;RUN: llc < %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI-CHECK --check-prefix=F %s
> +
> +; XXX: Merge this into setcc, once R600 supports 64-bit operations
> +
> +;;;==========================================================================;;;
> +;; Double comparisons
> +;;;==========================================================================;;;
> +
> +; F-LABEL: @f64_oeq
> +; SI-CHECK: V_CMP_EQ_F64
> +define void @f64_oeq(i32 addrspace(1)* %out, double %a, double %b) {
> +entry:
> + %0 = fcmp oeq double %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f64_ogt
> +; SI-CHECK: V_CMP_GT_F64
> +define void @f64_ogt(i32 addrspace(1)* %out, double %a, double %b) {
> +entry:
> + %0 = fcmp ogt double %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f64_oge
> +; SI-CHECK: V_CMP_GE_F64
> +define void @f64_oge(i32 addrspace(1)* %out, double %a, double %b) {
> +entry:
> + %0 = fcmp oge double %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f64_olt
> +; SI-CHECK: V_CMP_LT_F64
> +define void @f64_olt(i32 addrspace(1)* %out, double %a, double %b) {
> +entry:
> + %0 = fcmp olt double %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f64_ole
> +; SI-CHECK: V_CMP_LE_F64
> +define void @f64_ole(i32 addrspace(1)* %out, double %a, double %b) {
> +entry:
> + %0 = fcmp ole double %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f64_one
> +; SI-CHECK: V_CMP_O_F64
> +; SI-CHECK: V_CMP_NEQ_F64
> +; SI-CHECK: S_AND_B64
> +define void @f64_one(i32 addrspace(1)* %out, double %a, double %b) {
> +entry:
> + %0 = fcmp one double %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f64_ord
> +; SI-CHECK: V_CMP_O_F64
> +define void @f64_ord(i32 addrspace(1)* %out, double %a, double %b) {
> +entry:
> + %0 = fcmp ord double %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f64_ueq
> +; SI-CHECK: V_CMP_U_F64
> +; SI-CHECK: V_CMP_EQ_F64
> +; SI-CHECK: S_OR_B64
> +define void @f64_ueq(i32 addrspace(1)* %out, double %a, double %b) {
> +entry:
> + %0 = fcmp ueq double %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f64_ugt
> +; SI-CHECK: V_CMP_U_F64
> +; SI-CHECK: V_CMP_GT_F64
> +; SI-CHECK: S_OR_B64
> +define void @f64_ugt(i32 addrspace(1)* %out, double %a, double %b) {
> +entry:
> + %0 = fcmp ugt double %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f64_uge
> +; SI-CHECK: V_CMP_U_F64
> +; SI-CHECK: V_CMP_GE_F64
> +; SI-CHECK: S_OR_B64
> +define void @f64_uge(i32 addrspace(1)* %out, double %a, double %b) {
> +entry:
> + %0 = fcmp uge double %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f64_ult
> +; SI-CHECK: V_CMP_U_F64
> +; SI-CHECK: V_CMP_LT_F64
> +; SI-CHECK: S_OR_B64
> +define void @f64_ult(i32 addrspace(1)* %out, double %a, double %b) {
> +entry:
> + %0 = fcmp ult double %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f64_ule
> +; SI-CHECK: V_CMP_U_F64
> +; SI-CHECK: V_CMP_LE_F64
> +; SI-CHECK: S_OR_B64
> +define void @f64_ule(i32 addrspace(1)* %out, double %a, double %b) {
> +entry:
> + %0 = fcmp ule double %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f64_une
> +; SI-CHECK: V_CMP_NEQ_F64
> +define void @f64_une(i32 addrspace(1)* %out, double %a, double %b) {
> +entry:
> + %0 = fcmp une double %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @f64_uno
> +; SI-CHECK: V_CMP_U_F64
> +define void @f64_uno(i32 addrspace(1)* %out, double %a, double %b) {
> +entry:
> + %0 = fcmp uno double %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +;;;==========================================================================;;;
> +;; 64-bit integer comparisons
> +;;;==========================================================================;;;
> +
> +; F-LABEL: @i64_eq
> +; SI-CHECK: V_CMP_EQ_I64
> +define void @i64_eq(i32 addrspace(1)* %out, i64 %a, i64 %b) {
> +entry:
> + %0 = icmp eq i64 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @i64_ne
> +; SI-CHECK: V_CMP_NE_I64
> +define void @i64_ne(i32 addrspace(1)* %out, i64 %a, i64 %b) {
> +entry:
> + %0 = icmp ne i64 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @i64_ugt
> +; SI-CHECK: V_CMP_GT_U64
> +define void @i64_ugt(i32 addrspace(1)* %out, i64 %a, i64 %b) {
> +entry:
> + %0 = icmp ugt i64 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @i64_uge
> +; SI-CHECK: V_CMP_GE_U64
> +define void @i64_uge(i32 addrspace(1)* %out, i64 %a, i64 %b) {
> +entry:
> + %0 = icmp uge i64 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @i64_ult
> +; SI-CHECK: V_CMP_LT_U64
> +define void @i64_ult(i32 addrspace(1)* %out, i64 %a, i64 %b) {
> +entry:
> + %0 = icmp ult i64 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @i64_ule
> +; SI-CHECK: V_CMP_LE_U64
> +define void @i64_ule(i32 addrspace(1)* %out, i64 %a, i64 %b) {
> +entry:
> + %0 = icmp ule i64 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @i64_sgt
> +; SI-CHECK: V_CMP_GT_I64
> +define void @i64_sgt(i32 addrspace(1)* %out, i64 %a, i64 %b) {
> +entry:
> + %0 = icmp sgt i64 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @i64_sge
> +; SI-CHECK: V_CMP_GE_I64
> +define void @i64_sge(i32 addrspace(1)* %out, i64 %a, i64 %b) {
> +entry:
> + %0 = icmp sge i64 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @i64_slt
> +; SI-CHECK: V_CMP_LT_I64
> +define void @i64_slt(i32 addrspace(1)* %out, i64 %a, i64 %b) {
> +entry:
> + %0 = icmp slt i64 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> +
> +; F-LABEL: @i64_sle
> +; SI-CHECK: V_CMP_LE_I64
> +define void @i64_sle(i32 addrspace(1)* %out, i64 %a, i64 %b) {
> +entry:
> + %0 = icmp sle i64 %a, %b
> + %1 = sext i1 %0 to i32
> + store i32 %1, i32 addrspace(1)* %out
> + ret void
> +}
> --
> 1.8.1.5
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
More information about the llvm-commits
mailing list