[PATCH] Avoid generating SHLD/SHRD for architectures that are known to have poor latency for these instructions.

[Eric Christopher]

>From her description it was a 15% win on a microbenchmark.

-eric

On Mon, Nov 18, 2013 at 8:36 AM, Nadav Rotem <nrotem at apple.com> wrote:
> Katya,
>
> From your earlier description it sounds like neither Intel nor AMD processors benefit from this transformation.  Why don’t we enable it only for Oz? What is the point of adding FeatureSlowSHLD?
>
> Thanks,
> Nadav
>
>
> On Nov 17, 2013, at 11:37 PM, Katya Romanova <Katya_Romanova at playstation.sony.com> wrote:
>
>>  Made the corrections based on Eric's comments.
>>
>> http://llvm-reviews.chandlerc.com/D2177
>>
>> CHANGE SINCE LAST DIFF
>>  http://llvm-reviews.chandlerc.com/D2177?vs=5537&id=5620#toc
>>
>> Files:
>>  test/CodeGen/X86/x86-64-double-shifts-var.ll
>>  test/CodeGen/X86/x86-64-double-precision-shift-left.ll
>>  test/CodeGen/X86/x86-64-double-precision-shift-right.ll
>>  test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll
>>  lib/Target/X86/X86ISelLowering.cpp
>>  lib/Target/X86/X86.td
>>  lib/Target/X86/X86Subtarget.cpp
>>  lib/Target/X86/X86Subtarget.h
>> <D2177.2.patch>
>